AM5718 Datasheet, PDF (298/388 Pages) Texas Instruments – AM571x Sitara™ Processors Silicon Revision 2.0

AM5718, AM5716
SPRS957A – MARCH 2016 – REVISED JUNE 2016
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SIGNALS
rgmii0_txd1
rgmii0_txd0
rgmii0_rxd3
rgmii0_rxd2
rgmii0_rxd1
rgmii0_rxd0
rgmii0_txc
rgmii0_rxctl
rgmii0_rxc
rgmii0_txctl
Table 7-83. GMAC RGMII IOSETs (continued)
BALL
IOSET3
MUX
BALL
V6
U6
V4
V3
Y2
W2
W9
V5
U5
V9
IOSET4
MUX
0
0
0
0
0
0
0
0
0
0
NOTE
To configure the desired Manual IO Timing Mode the user must follow the steps described in
section "Manual IO Timing Modes" of the Device TRM.
The associated registers to configure are listed in the CFG REGISTER column. For more
information please see the Control Module Chapter in the Device TRM.
298 Timing Requirements and Switching Characteristics
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