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DRV425 Datasheet, PDF (29/37 Pages) Texas Instruments – DRV425 Fluxgate Magnetic-Field Sensor
www.ti.com
9 Power-Supply Recommendations
DRV425
SBOS729 – OCTOBER 2015
9.1 Power-Supply Decoupling
Decouple both VDD pins of the DRV425 with 1-µF, X7R-type ceramic capacitors to the adjacent GND pin as
illustrated in Figure 76. For best performance, place both decoupling capacitors as close to the related power-
supply pins as possible. Connect these capacitors to the power-supply source in a way that allows the current to
flow through the pads of the decoupling capacitors.
9.2 Power-On Start-Up and Brownout
Power-on is detected when the supply voltage exceeds 2.4 V at the VDD pin. At this point, the DRV425 initiates
the following start-up sequence:
1. Digital logic starts up and waits for 26 μs for the supply to settle.
2. The fluxgate sensor powers up.
3. The compensation loop is active 70 μs after the supply voltage exceeds 2.4 V.
During this startup sequence, the DRV1 and DRV2 outputs are pulled low to prevent undesired signals on the
compensation coil and the ERROR pin is asserted low.
The DRV425 tests for low supply voltages with a brownout voltage level of 2.4 V. Use a power-supply source
capable of supporting large current pulses driven by the DRV425, and low-ESR bypass capacitors for a stable
supply voltage in the system. A supply drop below 2.4 V that lasts longer than 20 μs generates a power-on reset;
the device ignores shorter voltage drops. A voltage drop on the VDD pin to below 1.8 V immediately initiates a
power-on reset. After the power supply returns to 2.4 V, the device initiates a start-up cycle.
9.3 Power Dissipation
The thermally-enhanced, PowerPAD, WQFN package reduces the thermal impedance from junction to case.
This package has a downset lead frame that the die is mounted to. The lead frame has an exposed thermal pad
(PowerPAD) on the underside of the package, and provides a good thermal path for heat dissipation.
The power dissipation on both linear outputs DRV1 and DRV2 is calculated with Equation 7:
PD(DRV) = IDRV × (VDRV – VSUPPLY)
where
• IDRV = supply current as shown in Figure 59,
• VDRV = voltage potential on the DRV1 or DRV2 output pin, and
• VSUPPLY = voltage potential closer to VDRV: VDD or GND
(7)
9.3.1 Thermal Pad
Packages with an exposed thermal pad are specifically designed to provide excellent power dissipation, but
board layout greatly influences the overall heat dissipation. Technical details are described in application report
PowerPad Thermally Enhanced Package, SLMA002, available for download at www.ti.com.
Copyright © 2015, Texas Instruments Incorporated
Product Folder Links: DRV425
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