DRV3203-Q1 Datasheet, PDF (29/39 Pages) Texas Instruments – DRV3203-Q1 Three-Phase Brushless Motor Driver

Not Recommended for New Designs
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DRV3203-Q1
SLVSC09B – MAY 2013 – REVISED JULY 2016
7.3.1.8 FLGFLT1 (address 0x09): Fault Flag Register 1
Bit
Name
Type ⁽¹⁾
Reset Description
7:1 RSVD R
0
VBUV RW
0000
000
1
Reserved
Fault flag bit of thermal shutdown condition.⁽²⁾
If FLTCFG.FLGLATCH_EN = 1
0: Read = No fault condition exists since last cleared.
Write = No effect
1: Read = Fault condition exists.
Write = Clear the flag
If FLTCFG.FLGLATCH_EN = 0
0: Read = No fault condition
Write = No effect
1: Read = Fault condition
Write = No effect
(1) R: Read, W: Write
(2) Assertion of the fault flags may occur during power up.
CS
SCK
Fault Event
Status N
Status N+1
SPI Read Buffer
Status N
Status N+1
SPI DOUT
FLTFLG*
Status N
Serial Output Format
FLTFLG*
Status N+1
Serial Output Format
Figure 25. SPI Data-Out Timing Chart of Fault Flag Registers
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