THS6022_16 Datasheet, PDF (28/44 Pages) Texas Instruments – 250-mA DUAL DIFFERENTIAL LINE DRIVER

THS6022
SLOS225D – SEPTEMBER 1998 – REVISED JULY 2007
www.ti.com
PCB Design Considerations
Proper PCB design techniques in two areas are important to assure proper operation of the THS6022. These
areas are high-speed layout techniques and thermal-management techniques. Because the THS6022 is a
high-speed part, the following guidelines are recommended.
• Ground plane—It is essential that a ground plane be used on the board to provide all components with a
low-inductance ground connection. Although a ground connection directly to a terminal of the THS6022 is not
necessarily required, it is recommended that the thermal pad of the package be tied to ground. This serves
two functions. It provides a low-inductance ground to the device substrate to minimize internal crosstalk, and
it provides the path for heat removal.
• Input stray capacitance—To minimize potential problems with amplifier oscillation, the capacitance at the
inverting input of the amplifiers must be kept to a minimum. To do this, PCB trace runs to the inverting input
must be as short as possible, the ground plane must be removed under any etch runs connected to the
inverting input, and external components should be placed as close as possible to the inverting input. This is
especially true in the noninverting configuration. An example of this can be seen in Figure 56, which shows
what happens when a 1-pF capacitor is added to the inverting input terminal in the noninverting
configuration. The bandwidth increases dramatically at the expense of peaking. This is because some of the
error current is flowing through the stray capacitor instead of the inverting node of the amplifier. While the
device is in the inverting mode, stray capacitance at the inverting input has a minimal effect. This is because
the inverting node is at a virtual ground and the voltage does not fluctuate nearly as much as in the
noninverting configuration. This can be seen in Figure 57, where a 27-pF capacitor adds only 0.5 dB of
peaking. In general, as the gain of the system increases, the output peaking due to this capacitor decreases.
While this can initially appear to be a faster and better system, overshoot and ringing are more likely to occur
under fast transient conditions. So, proper analysis of adding a capacitor to the inverting input node should
always be performed for stable operation.
OUTPUT AMPLITUDE
vs
FREQUENCY
3
V_CC = ±15 V
2 Gain = 1
R_L = 50 Ω
1 VO = 0.2 V
C_i = 1 pF
0
−1
−2
C_i = 0 pF
(Stray C Only)
−3
C in
1 kΩ
−4 _VI
−5
−
+
V_O
50 Ω
50 Ω
OUTPUT AMPLITUDE
vs
FREQUENCY
2
1
C_i = 27 pF
0
V_CC = ±15 V
−1 Gain = −1
R_L = 50 Ω
−2 V_O = 0.2 V
−3
C_i = 0 pF
(Stray C Only)
−4
−5
V_I
−6
1 kΩ
50 Ω
C in
1 kΩ
−
+
V_O
R_L = 50 Ω
−6
100k
1M
10M
f − Frequency − Hz
100M
500M
G050
−7
100k
1M
10M
f − Frequency − Hz
100M
500M
G051
Figure 56.
Figure 57.
• Proper power supply decoupling—Use a minimum of a 6.8-μF tantalum capacitor in parallel with a 0.1-μF
ceramic capacitor on each supply terminal. It may be possible to share the tantalum among several
amplifiers depending on the application, but a 0.1-μF ceramic capacitor should always be used on the supply
terminal of every amplifier. In addition, the 0.1-μF capacitor should be placed as close as possible to the
supply terminal. As this distance increases, the inductance in the connecting etch makes the capacitor less
effective. The designer should strive for distances of less than 0.1 inch (2.55 mm) between the device power
terminal and the ceramic capacitors.
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