DAC60096 Datasheet, PDF (28/51 Pages) Texas Instruments – 96-Channel, 12-Bit, Low-Power, Serial-Input, High-Voltage Output DAC

DAC60096
SBAS721A – DECEMBER 2015 – REVISED JANUARY 2016
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7.6.4 CRC Register (address = 0x5) [reset = 0xFFF]
Figure 43. CRC Register
15
14
13
12
11
10
9
8
CRC[15:0]
R
7
6
5
4
3
2
1
0
CRC[15:0]
R
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 7. CRC Register
Bit Field
15:0 CRC[15:0]
Type
R
Reset
FFFF
Description
Stores the CRC computation data for each SPI data write. CRC
includes stream writes. The address byte is not included in the
CRC computation.
Reading Reg CRC resets current CRC value to 0xFFFF. CRC is
calculated when CS is enabled and the data cycle contains a
multiple of 16 bits. The redundant data are not written into the
register.
CRC-CCITT polynomial is used x¹⁶ + x¹² + x⁵ + 1, or in hex:
0x1021 with default 0xFFFF.
X¹⁵
X¹⁴
X¹³
X¹²
X¹¹
X¹⁰
X⁹
X⁸
X⁷
X⁶
X⁵
X⁴
X³
X²
X¹
X⁰
Figure 44. CRC CCITT 16
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