DAC60096 Datasheet, PDF (25/51 Pages) Texas Instruments – 96-Channel, 12-Bit, Low-Power, Serial-Input, High-Voltage Output DAC

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DAC60096
SBAS721A – DECEMBER 2015 – REVISED JANUARY 2016
7.6 Register Maps
Communication to the DAC60096 is done at a subsystem level. Subsystem addressing is done through the
global pointer register, SID[1:0]. Each subsystem has 16 registers. Access to the data registers of any of the
DACs in the chosen subsystem is done through a DAC pointer, DPTR[4:0].
Reg6
SID[1:0]
SUB-SYSTEM 4
SUB-SYSTEM 3
SUB-SYSTEM 2
SUB-SYSTEM 1
Reg0/1
Reg4
Reg5
Reg7
Reg8
Reg9
DPTR[4:0]
CON
CRC
SWR
PWRM
SDIV
Reg0
Reg1
DAC
Buffer
Register
A
DAC
Active
Register A
(Asynchronous Mode)
LDAC Trigger
(Synchronous Mode)
(Asynchronous Mode)
DAC
Buffer
Register
B
DAC
Active
Register
B
0x0000
Clear State
Square-Wave
Mode
12-Bit
DAC
...DACn
DAC2
DAC1
Figure 39. Register Configuration
REGISTER
BUFA
BUFB
RESERVED
RESERVED
CON
CRC
PTR
SWR
PWRM
SDIV
RESERVED
Table 3. Register Map
ADDRESS
REGISTER SETUP
TYPE RESET
A3 A2 A1 A0 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6
R/W
0000
0000
BUFA
R/W
0000
0001
BUFB
--
0000 0 0 1 0
0
0
0
0
0
0
0
0
0
0
--
0000 0 0 1 1
0
0
0
0
0
0
0
0
0
0
R/W
0555
0 1 0 0 LDAC 0
0
0
SDO2x
SDRV
PHAINV
R
FFFF 0 1 0 1
CRC
R
0000 0 1 1 0
0
0
SID
0
0
0
0
0
0
R/W
0000
0111
SWR
R/W CAFE 1 0 0 0
PWRM
R/W
0000
1001
0
0
0
0
0
0
0
0
0
0
--
0000
0xA – 0xF
------
D5 D4
0
0
0
0
CLRDAC
0
0
0
D3 D2 D1 D0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
APB
DPTR
0
SDIV
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