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THS6204 Datasheet, PDF (26/43 Pages) Texas Instruments – Dual-Port, Differential VDSL2 Line Driver Amplifiers
◁
THS6204
SBOS416C – OCTOBER 2007 – REVISED APRIL 2009 ................................................................................................................................................... www.ti.com
with VPP as defined in Equation 8, and RM as defined
in Equation 3 and shown in Figure 83.
V1, V2, R1, and R2 are given in Table 3 for ±12V
operation.
RM
VPP
=
2VLPP
n
VLPP
n
RM
RL
VLPP
Figure 83. Driver Peak Output Voltage
With the previous information available, it is now
possible to select a supply voltage and the turns ratio
desired for the transformer as well as calculate the
headroom for the THS6204.
The model, shown in Figure 84, can be described
with the following set of equations:
1. As available output swing:
V
PP
=
VCC
-
(V
1
+
V)
2
-
IP
´
(R
1
+
R)
2
(10)
2. Or as required supply voltage:
V
CC
=
VPP
+
(V
1
+
V)
2
+
IP
´
(R
1
+
R)
2
(11)
The minimum supply voltage for a power and load
requirement is given by Equation 11.
+VCC
R1
V1
Table 3. Line Driver Headroom Model Values
V1
R1
V2
R2
±12V
1V
0.6V
1V
1.2V
When using a synthetic output impedance circuit,
such as the one shown in Figure 82, a significant
drop is noticed in bandwidth from the bandwidth
appearing in the Electrical Characteristics tables. This
apparent drop in bandwidth for the differential signal
is a result of the apparent increase in the feedback
transimpedance as seen for each amplifier. This
feedback transimpedance equation is given below.
Z
FB
=
R
F
´
1 + 2 ´ RS + RS
RL
RP
1 + 2 ´ RS + RS - RF
RL
RP
RP
(12)
To increase 0.1dB flatness to the frequency of
interest, adding a serial R-C in parallel with the gain
resistor may be needed, as shown in Figure 85.
RS
1/4
THS6204
RF
RP
RM
VIN
RG
RP
CM
RF
ZLINE
100W
VO
IP
V2
R2
1/4
RS
THS6204
Figure 85. 0.1dB Flatness Compensation Circuit
Figure 84. Line Driver Headroom Model
26
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