ADC08DL500_15 Datasheet, PDF (26/57 Pages) Texas Instruments – Low Power, 8-Bit, Dual 500 MSPS A/D Converter

ADC08DL500
SNAS495C – MARCH 2011 – REVISED MARCH 2011
CLK
DCLK_RST-
DCLK_RST+
DCLK+
OUTEDGE
t_PWR
t_HR
t_SR
Synchronizing Edge
t_OD
Figure 7. Clock Reset Timing in SDR Mode with OUTEDGE Low
CLK
DCLK_RST-
DCLK_RST+
DCLK+
OUTEDGE
t_PWR
t_HR
t_SR
Synchronizing Edge
t_OD
Figure 8. Clock Reset Timing in SDR Mode with OUTEDGE High
t_CAL
t_CAL
CalRun
t_CalDly
Calibration Delay
determined by
CAL
CalDly Pin (127)
POWER
SUPPLY
t_{CAL_L}
t_{CAL_H}
Figure 9. Power-up Calibration and On-Command Calibration Timing
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