TLC2272 Datasheet, PDF (25/63 Pages) Texas Instruments – Advanced LinCMOS Rail-to-Rail Operational Amplifiers

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8 Application and Implementation
TLC2272, TLC2272A, TLC2272M, TLC2272AM
TLC2274, TLC2274A, TLC2274M, TLC2274AM
SLOS190H – FEBRUARY 1997 – REVISED MARCH 2016
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
8.1.1 Macromodel Information
Macromodel information provided was derived using MicroSim Parts™, the model generation software used with
MicroSim PSpice™. The Boyle macromodel ⁽¹⁾ and subcircuit in Figure 59 were generated using the TLC227x
typical electrical and operating characteristics at T_A = 25°C. Using this information, output simulations of the
following key parameters can be generated to a tolerance of 20% (in most cases):
• Maximum positive output voltage swing
• Maximum negative output voltage swing
• Slew rate
• Quiescent power dissipation
• Input bias current
• Open-loop voltage amplification
• Unity gain frequency
• Common-mode rejection ratio
• Phase margin
• DC output resistance
• AC output resistance
• Short-circuit output current limit
3
VCC ₊
RP
2
IN −
IN +
1
RSS
ISS
10
DP
J1
J2
11
RD1
12
C1
RD2
+
VC
R2
−
53
DC
VCC _−
VAD ⁺
−
4
60
DE
54
−+
VE
.SUBCKT TLC227x 1 2 3 4 5
C1
11
1214E−12
C2
6
760.00E−12
DC
5
53DX
DE
54
5DX
DLP 90
91DX
DLN 92
90DX
DP
4
3DX
EGND 99
0POLY (2) (3,0) (4,) 0 .5 .5
FB
99
0POLY (5) VB VC VE VLP VLN 0
+ 984.9E3 −1E6 1E6 1E6 −1E6
GA
6
011 12 377.0E−6
GCM 0 6 10 99 134E−9
ISS
3
10DC 216.OE−6
HLIM 90
0VLIM 1K
J1
11
210 JX
J2
12
110 JX
R2
6
9100.OE3
99
EGND ₊
9
+
VB
−
FB
−
C2
6
GCM
GA
DIN
90
RO2
HLIM
+ _DIP
−
7
+
VLIM
−
8
91
+
VIP
−
92
−
VIN
+
RO1
5
OUT
RD1 60
112.653E3
RD2 60
122.653E3
R01
8
550
R02
7
9950
RP
3
44.310E3
RSS 10
99925.9E3
VAD 60
4−.5
VB
9
0DC 0
VC 3 53 DC .78
VE
54
4DC .78
VLIM 7
8DC 0
VLP
91
0DC 1.9
VLN 0
92DC 9.4
.MODEL DX D (IS=800.0E−18)
.MODEL JX PJF (IS=1.500E−12BETA=1.316E-3
+ VTO=−.270)
.ENDS
Figure 59. Boyle Macromodel and Subcircuit
(1) Macromodeling of Integrated Circuit Operational Amplifiers, IEEE Journal of Solid-State Circuits, SC-9, 353 (1974).
Copyright © 1997–2016, Texas Instruments Incorporated
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