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BQ27425-G1 Datasheet, PDF (25/32 Pages) Texas Instruments – System-Side Impedance Track™ Fuel Gauge With Integrated Sense Resistor
bq27425-G1
www.ti.com
SLUSAI6 – NOVEMBER 2011
I2C Command Waiting Time
To make sure the correct results of a command with the 400KHz I2C operation, a proper waiting time should be
added between issuing command and reading results. For Subcommands, the following diagram shows, as an
example, the 66 µs waiting time required between issuing the control command and reading the status data.
Similarly, a 100 ms waiting time is required between the BlockDataChecksum( ) Extended command. For
read-write Standard Commands, such as Temperature( ), a minimum of 2 seconds is needed to observe the data
read back following the associated data write. For read-only standard commands, there is no waiting time
required; however, the host should not issue all standard commands more than two times per second.
Otherwise, the gauge could result in a reset issue due to the expiration of a watchdog timer.
S ADDR [6:0] 0 A
S ADDR [6:0] 0 A
CMD [7:0]
CMD [7:0]
A DATA [7:0] A DATA [7:0] A P 66ms
A Sr ADDR [6:0] 1 A DATA [7:0] A DATA [7:0]
Waiting time between control subcommand and reading results
N P 66ms
S ADDR [6:0] 0 A CMD [7:0] A Sr ADDR [6:0] 1 A DATA [7:0] A DATA [7:0] A
DATA [7:0] A DATA [7:0] N P 66ms
Waiting time between continuous reading results
I2C Clock Stretching
I2C clock stretches can occur during all modes of fuel gauge operation. In the SLEEP and HIBERNATE modes, a
short clock stretch of approximately 75 µs will occur on all I2C traffic as the device must wake-up to process the
packet. In NORMAL mode, clock stretching will only occur for packets addressed for the fuel gauge. The timing
of stretches will vary as interactions between the communicating host and the gauge are asynchronous. The I2C
clock stretches may occur after start bits, the ACK/NAK bit and first data bit transmit on a host read cycle. The
majority of clock stretch periods are small (<= 4mSec) as the I2C interface peripheral and CPU firmware perform
normal data flow control. However, very infrequent clock stretch periods of up to 144 ms maximum may occur if
the host issues an I2C command while the gauge is asynchronously updating NVM data tables.
Copyright © 2011, Texas Instruments Incorporated
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