AM4376_16 Datasheet, PDF (248/266 Pages) Texas Instruments – Sitara Processors

AM4376, AM4377, AM4378, AM4379
SPRS851C – JUNE 2014 – REVISED APRIL 2016
www.ti.com
Table 5-128. Switching Characteristics for MMC[x]_CLK
(see Figure 5-141)
NO.
PARAMETER
STANDARD MODE
MIN TYP MAX
HIGH-SPEED MODE
UNIT
MIN TYP MAX
f_op(CLK)
Operating frequency, MMC_CLK
5
t_cop(CLK)
f_id(CLK)
Operating period: MMC_CLK
Identification mode frequency, MMC_CLK
t_cid(CLK)
Identification mode period: MMC_CLK
6 t_w(CLKL)
Pulse duration, MMC_CLK low
7 t_w(CLKH)
Pulse duration, MMC_CLK high
8 t_r(CLK)
Rise time, All Signals (10% to 90%)
9 t_f(CLK)
Fall time, All Signals (10% to 90%)
(1) P = MMC_CLK period.
41.7
2500
(0.5*P) - t_f(CLK)(1)
(0.5*P) - t_r(CLK)(1)
24
20.8
400
2500
(0.5*P) - t_f(CLK)(1)
(0.5*P) - t_r(CLK)(1)
2.2
2.2
48 MHz
ns
400 kHz
ns
ns
ns
2.2 ns
2.2 ns
MMC[x]_CLK (Output)
5
6
7
8
9
Figure 5-141. MMC[x]_CLK Timing
Table 5-129. Switching Characteristics for MMC[x]_CMD and MMC[x]_DAT[7:0]—HSPE=0
(see Figure 5-142)
OPP50/OPP100
NO.
PARAMETER
1.8 V
3.3 V
MIN TYP
MAX
MIN TYP
MAX
10 t_d(CLKL-CMD)
Delay time, MMC_CLK falling clock
edge to MMC_CMD transition
-4
14
-4
17.5
11 t_d(CLKL-DAT)
Delay time, MMC_CLK falling clock
edge to MMC_DATx transition
-4
14
-4
17.5
UNIT
ns
ns
10
MMC[x]_CLK (Output)
MMC[x]_CMD (Output)
MMC[x]_DAT[7:0] (Outputs)
11
Figure 5-142. MMC[x]_CMD and MMC[x]_DAT[7:0] Output Timing—HSPE=0
248 Specifications
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