AM4376_16 Datasheet, PDF (112/266 Pages) Texas Instruments – Sitara Processors

AM4376, AM4377, AM4378, AM4379
SPRS851C – JUNE 2014 – REVISED APRIL 2016
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5.8 ADC0: Touch Screen Controller and Analog-to-Digital Subsystem Electrical Parameters
The touch screen controller (TSC) and analog-to-digital converter (ADC) subsystem (ADC0) contains a
single-channel ADC connected to an 8:1 analog multiplexer which operates as a general-purpose ADC
with optional support for interleaving TSC conversions for 4-wire, 5-wire, or 8-wire resistive panels. The
ADC0 subsystem can be configured for use in one of the following applications:
• 8 general-purpose ADC channels
• 4-wire TSC with 4 general-purpose ADC channels
• 5-wire TSC with 3 general-purpose ADC channels
• 8-wire TSC
Table 5-5 summarizes the ADC0 subsystem electrical parameters.
Table 5-5. ADC0 Electrical Parameters
PARAMETER
ANALOG INPUT
ADC0_VREFP⁽¹⁾
TEST CONDITIONS
ADC0_VREFN⁽¹⁾
ADC0_VREFP + ADC0_VREFN
Full-scale Input Range
Internal Voltage Reference
External Voltage Reference
Differential Nonlinearity
(DNL)
Internal Voltage Reference:
VDDA_ADC0 = 1.8 V
External Voltage Reference:
VREFP – VREFN = 1.8 V
Integral Nonlinearity (INL)
Source impedance = 50 Ω
Internal Voltage Reference:
VDDA_ADC0 = 1.8 V
External Voltage Reference:
VREFP – VREFN = 1.8 V
Source Impedance = 1 kΩ
Internal Voltage Reference:
VDDA_ADC0 = 1.8 V
External Voltage Reference:
VREFP – VREFN = 1.8 V
Gain Error
Internal Voltage Reference:
VDDA_ADC0 = 1.8 V
External Voltage Reference:
VREFP – VREFN = 1.8 V
Offset Error
Internal Voltage Reference:
VDDA_ADC0 = 1.8 V
External Voltage Reference:
VREFP – VREFN = 1.8 V
Input Sampling Capacitance
Signal-to-Noise Ratio
(SNR)
Internal Voltage Reference:
VDDA_ADC0 = 1.8 V
External Voltage Reference:
VREFP – VREFN = 1.8 V
Input Signal: 30 kHz sine wave at
–0.5 dB Full Scale
Total Harmonic Distortion
(THD)
Internal Voltage Reference:
VDDA_ADC0 = 1.8 V
External Voltage Reference:
VREFP – VREFN = 1.8 V
Input Signal: 30 kHz sine wave at
–0.5 dB Full Scale
MIN
NOM
(0.5 × VDDA_ADC0) +
0.25
0
VDDA_ADC0
0
ADC0_VREFN
–1
0.5
–2
±1
±1
±2
±2
5.5
70
75
MAX
VDDA_ADC0
(0.5 × VDDA_ADC0) –
0.25
VDDA_ADC0
ADC0_VREFP
1
2
UNIT
V
V
V
V
LSB
LSB
LSB
LSB
pF
dB
dB
112 Specifications
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