OPA354_16 Datasheet, PDF (24/44 Pages) Texas Instruments – 250-MHz, Rail-to-Rail I/O, CMOS Operational Amplifiers

OPA354, OPA2354, OPA4354
SBOS233F – MARCH 2002 – REVISED JUNE 2016
www.ti.com
Power Dissipation (continued)
Any tendency to activate the thermal protection circuit indicates excessive power dissipation or an inadequate
heatsink. For reliable operation, junction temperature must be limited to 150°C, maximum. To estimate the
margin of safety in a complete design, increase the ambient temperature until the thermal protection is triggered
at 160°C. The thermal protection should trigger more than 35°C above the maximum expected ambient condition
of the application.
11.4 PowerPAD Thermally-Enhanced Package
In addition to the regular 5-pin SOT-23 and 9-pin VSSOP packages, the single and dual versions of the OPA354
also come in an 8-pin SOIC PowerPAD package. The 98-pin SO with PowerPAD is a standard size 8-pin SOIC
package where the exposed leadframe on the bottom of the package can be soldered directly to the PCB to
create an extremely low thermal resistance. This direct attachment enhances the OPA354 power dissipation
capability significantly, and eliminates the use of bulky heatsinks and slugs traditionally used in thermal
packages. This package can be easily mounted using standard PCB assembly techniques.
NOTE
Because the 8-pin HSOP PowerPAD is pin-compatible with standard 8-pin SOIC
packages, the OPA354 and OPA2354 can directly replace operational amplifiers in
existing sockets. Soldering the PowerPAD to the PCB is always required, even with
applications that have low power dissipation. This configuration provides the necessary
thermal and mechanical connection between the leadframe die pad and the PCB.
The PowerPAD package is designed so that the leadframe die pad (or thermal pad) is exposed on the bottom of
the IC, as shown in Figure 40. This exposed die provides an extremely low thermal resistance (R_θJC) path
between the die and the exterior of the package. The thermal pad on the bottom of the IC can then be soldered
directly to the PCB, using the PCB as a heatsink. In addition, plated-through holes (vias) provide a low thermal
resistance heat flow path to the back side of the PCB.
Leadframe (Copper Alloy)
IC (Silicon)
Die Attach (Epoxy)
Mold Compound (Plastic)
Leadframe Die Pad
Exposed at Base of the Package
(Copper Alloy)
Figure 40. Section View of a PowerPAD Package
11.5 PowerPAD Assembly Process
The PowerPAD must be connected to the most negative supply voltage for the device, which is ground in single-
supply applications and V− in split-supply applications.
Prepare the PCB with a top-side etch pattern, as shown in Figure 41. The exact land design may vary based on
the specific assembly process requirements. There must be etch for the leads as well as etch for the thermal
land.
Place the recommended number of plated-through holes (or thermal vias) in the area of the thermal pad. These
holes must be 13 mils (.013 in) in diameter. They are kept small so that solder wicking through the holes is not a
problem during reflow. TI recommends a minimum of 5 holes for the 8-pin HSOP PowerPAD package, as shown
in Figure 41.
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