LM3S1751_16 Datasheet, PDF (239/679 Pages) Texas Instruments – Stellaris LM3S1751 Microcontroller

Stellaris^® LM3S1751 Microcontroller
2. A cold POR, when both the V_DD and V_BAT supplies are removed.
Any other reset condition is ignored by the Hibernation module.
Table 6-3. Hibernation Module Register Map
Offset Name
Type
Reset
Description
0x000 HIBRTCC
0x004 HIBRTCM0
0x008 HIBRTCM1
0x00C HIBRTCLD
0x010 HIBCTL
0x014 HIBIM
0x018 HIBRIS
0x01C HIBMIS
0x020 HIBIC
0x024 HIBRTCT
0x030-
0x12C
HIBDATA
RO
R/W
R/W
R/W
R/W
R/W
RO
RO
R/W1C
R/W
R/W
0x0000.0000
0xFFFF.FFFF
0xFFFF.FFFF
0xFFFF.FFFF
0x8000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.7FFF
-
Hibernation RTC Counter
Hibernation RTC Match 0
Hibernation RTC Match 1
Hibernation RTC Load
Hibernation Control
Hibernation Interrupt Mask
Hibernation Raw Interrupt Status
Hibernation Masked Interrupt Status
Hibernation Interrupt Clear
Hibernation RTC Trim
Hibernation Data
See
page
240
241
242
243
244
246
247
248
249
250
251
6.6 Register Descriptions
The remainder of this section lists and describes the Hibernation module registers, in numerical
order by address offset.
July 15, 2014
239
Texas Instruments-Production Data