THS7368_14 Datasheet, PDF (23/41 Pages) Texas Instruments – 6-Channel Video Amplifier with 3-SD and 3-SD/ED/HD/Full-HD Filters and 6-dB Gain

THS7368
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INPUT MODE OF OPERATION: AC SYNC TIP
CLAMP
Some video DACs or encoders are not referenced to
ground but rather to the positive power supply. The
resulting video signals are generally at too great a
voltage for a dc-coupled video buffer to function
properly. To account for this scenario, the THS7368
incorporates a sync-tip clamp circuit. This function
requires a capacitor (nominally 0.1 μF) to be in series
with the input. Although the term sync-tip-clamp is
used throughout this document, it should be noted
that the THS7368 would probably be better termed as
a dc restoration circuit based on how this function is
performed. This circuit is an active clamp circuit and
not a passive diode clamp function.
The input to the THS7368 has an internal control loop
that sets the lowest input applied voltage to clamp at
ground (0 V). By setting the reference at 0 V, the
THS7368 allows a dc-coupled input to also function.
Therefore, the sync-tip-clamp (STC) is considered
transparent because it does not operate unless the
input signal goes below ground. The signal then goes
through the same 150-mV level shifter, resulting in an
output voltage low level of 300 mV. If the input signal
tries to go below 0 V, the THS7368 internal control
loop sources up to 6 mA of current to increase the
input voltage level on the THS7368 input side of the
coupling capacitor. As soon as the voltage goes
above the 0-V level, the loop stops sourcing current
and becomes very high impedance.
One of the concerns about the sync-tip-clamp level is
how the clamp reacts to a sync edge that has
overshoot—common in VCR signals, noise, DAC
overshoot, or reflections found in poor printed circuit
board (PCB) layouts. Ideally, the STC should not
react to the overshoot voltage of the input signal.
Otherwise, this response could result in clipping on
the rest of the video signal because it may raise the
bias voltage too much.
To help minimize this input signal overshoot problem,
the control loop in the THS7368 has an internal
low-pass filter, as shown in Figure 39. This filter
reduces the response time of the STC circuit. This
delay is a function of how far the voltage is below
ground, but in general it is approximately a 400-ns
delay for the SD channel filters and approximately a
150-ns delay for the SF filters. The effect of this filter
is to slow down the response of the control loop so as
not to clamp on the input overshoot voltage but rather
the flat portion of the sync signal.
SBOS497 – DECEMBER 2009
As a result of this delay, sync may have an apparent
voltage shift. The amount of shift depends on the
amount of droop in the signal as dictated by the input
capacitor and the STC current flow. Because sync is
used primarily for timing purposes with syncing
occurring on the edge of the sync signal, this shift is
transparent in most systems.
Input
0.1 mF ^Input
Pin
+V_S
+V_S
STC LPF
g_m
800 kW
Internal
Circuitry
Level
Shift
Figure 39. Equivalent AC Sync-Tip-Clamp Input
Circuit
While this feature may not fully eliminate overshoot
issues on the input signal, in cases of extreme
overshoot and/or ringing, the STC system should help
minimize improper clamping levels. As an additional
method to help minimize this issue, an external
capacitor (for example, 10 pF to 47 pF) to ground in
parallel with the external termination resistors can
help filter overshoot problems.
It should be noted that this STC system is dynamic
and does not rely upon timing in any way. It only
depends on the voltage that appears at the input pin
at any given point in time. The STC filtering helps
minimize level shift problems associated with
switching noises or very short spikes on the signal
line. This architecture helps ensure a very robust
STC system.
When the ac STC operation is used, there must also
be some finite amount of discharge bias current. As
previously described, if the input signal goes below
the 0-V clamp level, the internal loop of the THS7368
sources current to increase the voltage appearing at
the input pin. As the difference between the signal
level and the 0-V reference level increases, the
amount of source current increases
proportionally—supplying up to 6 mA of current.
Thus, the time to re-establish the proper STC voltage
can be very fast. If the difference is very small, then
the source current is also very small to account for
minor voltage droop.
Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s): THS7368
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