BUF12840_15 Datasheet, PDF (22/31 Pages) Texas Instruments – Programmable Gamma-Voltage Generator

BUF12840
SBOS519A – OCTOBER 2010 – REVISED JULY 2011
OUTPUT PROTECTION
The BUF12840 output stages can safely source and
sink the current levels indicated in Figure 1. However,
there are other modes where precautions must be
taken to prevent to the output stages from being
damaged by excessive current flow. The outputs
(OUT1 through OUT12) include electrostatic
discharge (ESD) protection diodes, as shown in
Figure 24. Normally, these diodes do not conduct and
are passive during typical device operation. Unusual
operating conditions can occur where the diodes may
conduct, potentially subjecting them to high, even
damaging current levels. These conditions are most
likely to occur when a voltage applied to an output
exceeds (V_S) + 0.5V, or drops below GND – 0.5V.
One common scenario where this condition can occur
is when the output pin is connected to a sufficiently
large capacitor, and the BUF12840 power-supply
source (V_S) is suddenly removed. Removing the
power-supply source allows the capacitor to
discharge through the current-steering diodes. The
energy released during the high current flow period
causes the power dissipation limits of the diode to be
exceeded. Protection against the high current flow
may be provided by placing a Schottky diode, as
shown in Figure 24. This diode must be capable of
discharging the capacitor without allowing more than
0.5V to develop across the internal ESD
current-steering diodes. It is not recommended that
large capacitors be connected to the output of the
gamma buffers.
Figure 25 shows a simplified schematic of the input
pins A0, BKSEL, EN, EA0, EA1, and LD. As shown,
there are no ESD cells or diodes to supply; therefore,
the input to the device can go above supply but must
be lower than 6V.
V_S
BUF12840
www.ti.com
ESD Current
Steering
Diodes
Schottky
Diode
OUTX
or
V_COM
External Capacitor
(not recommended)
Figure 24. Output Pins ESD Protection
Current-Steering Diodes
DVDD
Digital Input
Logic Input
ESD
Only
DVSS
Figure 25. Digital Input Model
Figure 26 shows a simplified schematic of the SDA
and SCL input/output pins. As shown, there are no
ESD cells or diodes to supply; therefore, the input to
the device can go above ground but must be lower
than 6V.
DVDD
Digital Input/Output
ESD
Only
DVSS
Figure 26. Digital Input/Output Model
Logic Output
Logic Input
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