BQ27510-G2 Datasheet, PDF (22/38 Pages) Texas Instruments – System-Side Impedance Track™ Fuel Gauge With Direct Battery Connection

bq27510-G2
SLUS948 – AUGUST 2010
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Default Ra and Ra Tables
These tables contain encoded data and, with the exception of the Default Ra Tables, are automatically updated
during device operation. No user changes should be made except for reading/writing the values from a
pre-learned pack (part of the process for creating golden image files).
DETAILED PIN DESCRIPTIONS
The Operation Configuration Register
Some bq27510-G2 pins are configured via the Operation Configuration data flash register, as indicated in
Table 5 3. This register is programmed/read via the methods described in Section Accessing the Data Flash. The
register is located at subclass = 64, offset = 0.
High Byte
Low Byte
bit7
RESCAP
GNDSEL
Table 10. Operation Configuration Bit Definition
bit6
BATG_OVR
IDSELEN
bit5
I2C_NACK
SLEEP
bit4
PFC_CFG1
RMFCC
bit3
PFC_CFG0
BATL_POL
bit2
IWAKE
BATG_POL
bit1
RSNS1
BAT_FN
bit0
RSNS0
TEMPS
RESCAP = No-load rate of compensation is applied to the reserve capacity calculation. True when set. Default is 0.
BATG_OVR =
BAT_GD override bit. If the gauge enters Hibernate only due to the cell voltage, the BAT_GD will not negate.
True when set. Default is 0.
I2C_NACK =
I2C clock stretch control during data flash update. When this bit is set, the I2C engine clock stretch is disabled
and NACK commands. When this bit is cleared, the I2C engine clock stretch is enabled. Default is 0.
PFC_CFG1/PFC_CFG0 =
Pin function code (PFC) mode selection: PFC 0, 1, or 2 selected by 0/0, 0/1, or 1/0, respectively. Default is
PFC 1 (0/1).
IWAKE/RSNS1/RSNS0 = These bits configure the current wake function (see Table 12). Default is 0/0/1.
GNDSEL = The ADC ground select control. The Vss (Pin 6) is selected as ground reference when the bit is clear. Pin 7 is
selected when the bit is set. Default is 0.
IDSELEN = Enables cell profile selection feature. True when set. Default is 1.
SLEEP = The fuel gauge can enter sleep, if operating conditions allow. True when set. Default is 1.
RMFCC = RM is updated with the value from FCC, on valid charge termination. True when set. Default is 1
BATL_POL = BAT_LOW pin is active-high. True when set. Default is 1.
BATG_POL = BAT_LOW/BAT_GD pin is active-low. True when cleared. Default is 0.
BAT_FN = Selects BAT_LOW (bit clear) or /BAT_GD (bit set) function on pin 12. Default is 0.
TEMPS = Selects external thermistor for Temperature( ) measurements. True when set. Default is 1.
Some bq27510-G2 pins are configured via the Operation Configuration B data flash register, as indicated in
Table 11. This register is programmed/read via the methods described in Section 4.2.1: Accessing the Data
Flash. The register is located at subclass =64, offset = 0.
Table 11. Operation Configuration B Bit Definition
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
RFACTSTEP SLPWKCHG
--
--
--
--
--
--
RFACTSTEP = Use min and max res factor to limit resistance change. True when set.
SLPWKCHG = Accumulates an extra 10 second x AverageCurrent() coulomb when waking from Sleep due to
AverageCurrent() > Sleep Current . True when set. Default is 1.
Pin Function Code Descriptions
The bq27510-G2 has three possible pin-function variations that can be selected in accordance with the circuit
architecture of the end application. Each variation has been assigned a pin function code, or PFC.
When the PFC is set to 0, the bq27510-G2 measures battery temperature under all conditions.
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