THS4520_14 Datasheet, PDF (21/37 Pages) Texas Instruments – WIDEBAND, LOW NOISE, LOW DISTORTION FULLY DIFFERENTIAL AMPLIFIER

THS4520
www.ti.com
SLOS503B – SEPTEMBER 2006 – REVISED JULY 2007
APPLICATION INFORMATION
APPLICATIONS
The following circuits show application information
for the THS4520. For simplicity, power supply
decoupling capacitors are not shown in these
diagrams. For more detail on the use and operation
of fully differential op amps see application report
Fully-Differential Amplifiers (SLOA054) .
Differential Input to Differential Output Amplifier
Single-Ended
R_G
Input
R_G
R_F
V_S
+–
THS4520
–+
Differential
Output
V_OUT–
V_OUT+
The THS4520 is a fully differential op amp, and can
be used to amplify differential input signals to
differential output signals. A basic block diagram of
the circuit is shown in Figure 59 (CM input not
shown). The gain of the circuit is set by R_F divided by
R_G.
V_S
R_F
Figure 60. Single-Ended Input to Differential
Output Amplifier
Differential
Input
R_G
V_IN+
R_G
V_IN–
R_F
V_S+
+–
THS4520
–+
Differential
Output
V_OUT–
V_OUT+
V_S–
R_F
Figure 59. Differential Input to Differential Output
Amplifier
Input Common-Mode Voltage Range
The input common-model voltage of a fully
differential op amp is the voltage at the '+' and '–'
input pins of the op amp.
It is important to not violate the input common-mode
voltage range (V_ICR) of the op amp. Assuming the op
amp is in linear operation, the differential voltage
across the input pins is only a few millivolts at most.
So finding the voltage at one input pin determines
the input common-mode voltage of the op amp.
Treating the negative input as a summing node, the
voltage is given by Equation 1:
V_IC
=
ççèæ ^VOUT+
´
R_G
R_G + R_F
÷÷øö
+
ççèæ ^VIN-
´
R_F
R_G + R_F
÷÷øö
(1)
Depending on the source and load, input and output
termination can be accomplished by adding R_IT and
R_O.
Single-Ended Input to Differential Output
Amplifier
The THS4520 can be used to amplify and convert
single-ended input signals to differential output
signals. A basic block diagram of the circuit is shown
in Figure 60 (CM input not shown). The gain of the
circuit is again set by R_F divided by R_G.
To determine the V_ICR of the op amp, the voltage at
the negative input is evaluated at the extremes of
V_OUT+.
As the gain of the op amp increases, the input
common-mode voltage becomes closer and closer to
the input common-mode voltage of the source.
Setting the Output Common-Mode Voltage
The output common-mode voltage is set by the
voltage at the CM pin. The internal common-mode
control circuit maintains the output common-mode
voltage within 0.25-mV offset (typical) from the set
voltage, when set within ±0.5 V of mid-supply. If left
unconnected, the common-mode set point is set to
mid-supply by internal circuitry, which may be
over-driven from an external source. Figure 61 is
representative of the CM input. The internal CM
circuit has about 230 MHz of bandwidth, which is
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