THS3201_14 Datasheet, PDF (21/40 Pages) Texas Instruments – 1.8-GHz, LOW DISTORTION, CURRENT-FEEDBACK AMPLIFIER

THS3201
www.ti.com ............................................................................................................................................................. SLOS416C – JUNE 2003 – REVISED JUNE 2009
being pulled away from the thermal pad area
during the reflow process.
7. Apply solder paste to the exposed thermal pad
area and all of the IC terminals.
8. With these preparatory steps in place, the IC is
simply placed in position and run through the
solder reflow operation as any standard
surface-mount component. This results in a part
that is properly installed.
POWER DISSIPATION AND THERMAL
CONSIDERATIONS
To maintain maximum output capabilities, the
THS3201 does not incorporate automatic thermal
shutoff protection. The designer must take care to
ensure that the design does not violate the absolute
maximum junction temperature of the device. Failure
may result if the absolute maximum junction
temperature of +150°C is exceeded. For best
performance, design for a maximum junction
temperature of +125°C. Between +125°C and
+150°C, damage does not occur, but the
performance of the amplifier begins to degrade.
The thermal characteristics of the device are dictated
by the package and the PCB. Maximum power
dissipation for a given package can be calculated
using the following formula.
P
=
T
Max
-
T
A
DMax
q_JA
Where:
• P_DMax is the maximum power dissipation in the
amplifier (W)
• T_Max is the absolute maximum junction
temperature (°C)
• T_A is the ambient temperature (°C)
• θ_JA = θ_JC + θ_CA
• θ_JC is the thermal coefficient from the silicon
junctions to the case (°C/W)
• θ_CA is the thermal coefficient from the case to the
ambient air (°C/W)
For systems where heat dissipation is more critical,
the THS3201 is offered in an 8-pin MSOP with
PowerPAD and also available in the SOIC-8
PowerPAD package, offering even better thermal
performance. The thermal coefficients for the
PowerPAD packages are substantially improved over
the traditional SOIC. Maximum power dissipation
levels are depicted in the graph for the available
packages. The data for the PowerPAD packages
assume a board layout that follows the PowerPAD
layout guidelines referenced above and detailed in
the PowerPAD application note number SLMA002.
The following graph also illustrates the effect of not
soldering the PowerPAD to a PCB. The thermal
impedance increases substantially which may cause
serious heat and performance issues. Be sure to
always solder the PowerPAD to the PCB for optimum
performance.
4.0
T_J = 125°C
3.5
3.0
θ_JA = 58.4°C/W
2.5
θ_JA = 98°C/W
2.0
1.5
1.0
0.5
θ_JA = 158°C/W
0.0
-40 -20 0 20 40 60 80 100
T_A - Free-Air Temperature - °C
Results are With No Air Flow and PCB Size = 3”x3”
θ_JA = 58.4°C/W for 8-Pin MSOP w/PowerPad (DGN)
θ_JA = 98°C/W for 8-Pin SOIC High Test PCB (D)
θ_JA = 158°C/W for 8-Pin MSOP w/PowerPad w/o Solder
Figure 64. Maximum Power Dissipation
vs Ambient Temperature
When determining whether or not the device satisfies
the maximum power dissipation requirement, it is
important to not only consider quiescent power
dissipation, but also dynamic power dissipation. Often
times, this is difficult to quantify because the signal
pattern is inconsistent, but an estimate of the RMS
power dissipation can provide visibility into a possible
problem.
Copyright © 2003–2009, Texas Instruments Incorporated
Product Folder Link(s): THS3201
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