OPA2846_14 Datasheet, PDF (21/30 Pages) Texas Instruments – Dual, Wideband, Low-Noise, Voltage-Feedback Operational Amplifier

OPA2846
www.ti.com
Figure 13 shows one example of an offset adjustment for
a DC-coupled signal path that will have minimum impact
on the signal frequency response. In this case, the input is
brought into an inverting gain resistor with the DC
adjustment an additional current summed into the
inverting node. The resistor values setting this offset
adjustment are much larger than the signal path resistors.
This will insure that this adjustment has minimal impact on
the loop gain and hence, the frequency response as well.
0.1µF 48Ω
+5V
Power−supply decoupling
not shown.
1/2
O P A 28 4 6
V_O
+5V
5kΩ
10kΩ
5kΩ
R_G
50Ω
V_I
20kΩ
0.1µF
−5V
R_F
1kΩ
±200mV Output Adjustment
V_{O = −} R_{F = −20}
V_I R_G
−5V
Figure 13. DC-Coupled, Inverting Gain of −20,
with Output Offset Adjustment
THERMAL ANALYSIS
The OPA2846 will not require heatsinking or airflow in
most applications. Maximum desired junction temperature
will set the maximum allowed internal power dissipation as
described below. In no case should the maximum junction
temperature be allowed to exceed +150°C.
Operating junction temperature (T_J) is given by
T_A + P_D × q_JA. The total internal power dissipation (P_D) is
the sum of quiescent power (P_DQ) and additional power
dissipated in the output stage (P_DL) to deliver load power.
Quiescent power is simply the specified no-load supply
current times the total supply voltage across the part. P_DL
will depend on the required output signal and load but
would, for a grounded resistive load, be at a maximum
when the output is fixed at a voltage equal to 1/2 either
supply voltage (for equal bipolar supplies). Under this
worst-case condition, P_DL = V_S2/(4 × R_L) where R_L
includes feedback network loading.
Note that it is the power in the output stage and not in the
load that determines internal power dissipation.
SBOS274C −JUNE 2003 − REVISED AUGUST 2008
As a worst-case example, compute the maximum T_J using
both channels of the OPA2846ID in the circuit of Figure 1
(page 12) operating at the maximum specified ambient
temperature of +85°C and driving a grounded 100Ω load
at +2.5V_DC:
P_D = 10V × (26.6mA) + 2 × [5²/(4 × (100Ω || 500Ω))] = 416mW
Maximum T_J = +85°C + (0.416Ω × 125°C/Ω) = 137°C
This absolute worst-case example will never be
encountered in practice. Therefore, 137°C sets an upper
limit to maximum operating junction temperature.
BOARD LAYOUT
Achieving optimum performance with a high-frequency
amplifier like the OPA2846 requires careful attention to
board layout parasitics and external component types.
Recommendations that will optimize performance include:
a) Minimize parasitic capacitance to any AC ground for
all of the signal I/O pins. Parasitic capacitance on the
output and inverting input pins can cause instability; on the
noninverting input, it can react with the source impedance
to cause unintentional bandlimiting. To reduce unwanted
capacitance, a window around the signal I/O pins should
be opened in all of the ground and power planes around
those pins. Otherwise, ground and power planes should
be unbroken elsewhere on the board.
b) Minimize the distance (< 0.25”) from the
power-supply pins to high-frequency 0.1µF decoup-
ling capacitors. At the device pins, the ground and
power-plane layout should not be in close proximity to the
signal I/O pins. Avoid narrow power and ground traces to
minimize inductance between the pins and the decoupling
capacitors. The power-supply connections should always
be decoupled with these capacitors. Larger (2.2µF to
6.8µF) decoupling capacitors, effective at lower frequen-
cies, should also be used on the main supply pins. These
may be placed somewhat farther from the device and may
be shared among several devices in the same area of the
PC board.
c) Careful selection and placement of external
components will preserve the high-frequency
performance of the OPA2846. Resistors should be a very
low reactance type. Surface-mount resistors work best
and allow a tighter overall layout. Metal-film and carbon
composition, axially-leaded resistors can also provide
good high-frequency performance. Again, keep their leads
and PCB trace length as short as possible. Never use
wirewound type resistors in a high-frequency application.
Since the output pin and inverting input pin are the most
sensitive to parasitic capacitance, always position the
feedback and series output resistor, if any, as close as
possible to the output pin. Other network components,
such as noninverting input termination resistors, should
also be placed close to the package. Where double-side
component mounting is allowed, place the feedback
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