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LMK00306 Datasheet, PDF (21/25 Pages) Texas Instruments – 3-GHz 6-Output Differential Clock Buffer/Level Translator
14.4.1.1 Power Dissipation Example: Worst-Case Dissipation
This example shows how to calculate IC power dissipation for a configuration to estimate worst-case power dissipation. In this
case, the maximum supply voltage and supply current values specified in Section 11.0 Electrical Characteristics are used.
• VCC = VCCO = 3.465 V. Max ICC and ICCO values.
• CLKin0/CLKin0* input is selected.
• Banks A and B are configured for LVPECL: all outputs terminated with 50 Ω to VT = Vcco - 2 V.
• REFout is enabled with 5 pF load.
• TA = 85 °C
Using the power calculations from the previous section and maximum supply current specifications, we can compute PTOTAL and
PDEVICE.
• From Equation 5: ICC_TOTAL = 10.5 mA + 22.5 mA + 22.5 mA + 5.5 mA = 61 mA
• From ICCO_PECL max spec: ICCO_BANK_A = ICCO_BANK_B = 115 mA
• From Equation 7: PTOTAL = 3.465 V * (61 mA + 115 mA + 115 mA + 10 mA) = 1043 mW
• From Equation 8: PRT_PECL = ((2.57 V - 1.47 V)2/50 Ω) + ((1.72 V - 1.47 V)2/50 Ω) = 25.5 mW (per output pair)
• From Equation 9: PVTT_PECL = 1.47 V * [ ((2.57 V - 1.47 V) / 50 Ω) + ((1.72 V - 1.47 V) / 50 Ω) ] = 39.5 mW (per output pair)
• From Equation 10: PRT_HCSL = 0 mW (no HCSL outputs)
• From Equation 11: PDEVICE = 1043 mW - (6 * (25.5 mW + 39.5 mW)) - 0 mW = 653 mW
In this worst-case example, the IC device will dissipate about 653 mW or 63% of the total power (1043 mW), while the remaining
37% will be dissipated in the LVPECL emitter resistors (153 mW for 6 pairs) and termination voltage (237 mW into Vcco - 2 V).
Based on θJA of 31.8 °C/W, the estimated die junction temperature would be about 21 °C above ambient, or 106 °C when TA = 85
°C.
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