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LMK00306 Datasheet, PDF (20/25 Pages) Texas Instruments – 3-GHz 6-Output Differential Clock Buffer/Level Translator
14.4 Power Supply and Thermal Considerations
14.4.1 Current Consumption and Power Dissipation Calculations
The current consumption values specified in Section 11.0 Electrical Characteristics can be used to calculate the total power dis-
sipation and IC power dissipation for any device configuration. The total VCC core supply current (ICC_TOTAL) can be calculated
using Equation 5:
ICC_TOTAL = ICC_CORE + ICC_BANK_A + ICC_BANK_B + ICC_CMOS
(5)
Where:
• ICC_CORE is the current for core logic and input blocks and depends on selected input (CLKinX or OSCin).
• ICC_BANK_A is the current for Bank A and depends on output type (ICC_PECL, ICC_LVDS, ICC_HCSL, or 0 mA if disabled).
• ICC_BANK_B is the current for Bank B and depends on output type (ICC_PECL, ICC_LVDS, ICC_HCSL, or 0 mA if disabled).
• ICC_CMOS is the current for the LVCMOS output (or 0 mA if REFout is disabled).
Since the output supplies (VCCOA, VCCOB, VCCOC) can be powered from 3 independent voltages, the respective output supply
currents (ICCO_BANK_A, ICCO_BANK_B, and ICCO_CMOS) should be calculated separately.
ICCO_BANK for either Bank A or B can be directly taken from the corresponding output supply current spec (ICCO_PECL, ICCO_LVDS, or
ICCO_HCSL) provided the output loading matches the specified conditions. Otherwise, ICCO_BANK should be calculated as fol-
lows:
ICCO_BANK = IBANK_BIAS + (N * IOUT_LOAD)
(6)
Where:
• IBANK_BIAS is the output bank bias current (fixed value).
• IOUT_LOAD is the DC load current per loaded output pair.
• N is the number of loaded output pairs per bank (N = 0 to 3).
Table 5 shows the typical IBANK_BIAS values and IOUT_LOAD expressions for LVPECL, LVDS, and HCSL.
For LVPECL, it is possible to use a larger termination resistor (RT) to ground instead of terminating with 50 Ω to VTT = Vcco - 2 V;
this technique is commonly used to eliminate the extra termination voltage supply (VTT) and potentially reduce device power
dissipation at the expense of lower output swing. For example, when Vcco is 3.3 V, a RT value of 160 Ω to ground will eliminate
the 1.3 V termination supply without sacrificing much output swing. In this case, the typical IOUT_LOAD is 25 mA, so ICCO_PECL for a
fully-loaded bank reduces to 95 mA (vs. 100 mA with 50 Ω resistors to Vcco – 2 V).
Current Parameter
IBANK_BIAS
IOUT_LOAD
TABLE 5. Typical Output Bank Bias and Load Currents
LVPECL
20 mA
(VOH - VTT)/RT + (VOL - VTT)/RT
LVDS
17.4 mA
0 mA
(No DC load current)
HCSL
3.6 mA
VOH/RT
Once the current consumption is known for each supply, the total power dissipation (PTOTAL) can be calculated as:
PTOTAL = (VCC*ICC_TOTAL) + (VCCOA*ICCO_BANK_A) + (VCCOB*ICCO_BANK_B) + (VCCOC*ICCO_CMOS)
(7)
If the device is configured with LVPECL or HCSL outputs, then it is also necessary to calculate the power dissipated in any
termination resistors (PRT_ PECL and PRT_HCSL) and in any LVPECL termination voltages (PVTT_PECL). The external power dissipation
values can be calculated as follows:
PRT_PECL (per LVPECL pair) = (VOH - VTT)2/RT + (VOL - VTT)2/RT
(8)
PVTT_PECL (per LVPECL pair) = VTT * [(VOH - VTT)/RT + (VOL - VTT)/RT]
(9)
PRT_HCSL (per HCSL pair) = VOH2 / RT
(10)
Finally, the IC power dissipation (PDEVICE) can be computed by subtracting the external power dissipation values from PTOTAL as
follows:
Where:
PDEVICE = PTOTAL - N1*(PRT_PECL + PVTT_PECL) - N2*PRT_HCSL
(11)
• N1 is the number of LVPECL output pairs with termination resistors to VTT (usually Vcco - 2 V or GND).
• N2 is the number of HCSL output pairs with termination resistors to GND.
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