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TLC320AD545 Datasheet, PDF (20/37 Pages) Texas Instruments – Single Channel Data/Fax Codec | |||
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4.3 FS High Mode Secondary Communication Timing
On the rising edge of DT_SCLK, coinciding with the falling edge of FS, D15âD0 is input serially to DT_DIN and
D15âD0 is output serially on DT_DOUT. If a secondary communication request is made, FS goes high again, 128
SCLKs after the beginning of the primary frame, to signal the beginning of the secondary frame one SCLK period later.
See Figure 4â5.
128 DT_SCLKs
P
S
P
P
DT_FS
DT_DIN
Data (D0=1)
Secondary Communication
Request
Register R/W
Data (D0=0)
No Secondary
ÃÃÃÃÃÃ
Communication Request
Figure 4â5. FS Output During Software Secondary Serial Communication Request
(FS High Mode)
4.4 FS Low Mode Secondary Communication Timing
On the falling edge of FS for that channel, D15âD0 is input serially to DT_DIN and D15âD0 is output serially on
DT_DOUT. FS remains low during the data transfer and then returns high. If a secondary communication request is
made, FS goes low 128 SCLKs after the beginning of the primary frame to signal the beginning of the secondary
frame. See Figure 4â6.
128 DT_SCLKs
DT_FS
P
S
P
DT_DIN
Data (D0=1)
Register R/W
Data (D0=0)
Secondary Communication
Request
No Secondary
Communication Request
Figure 4â6. FS Output During Software Secondary Serial Communication Request
(FS Low Mode)
4â4
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