DAC900-Q1 Datasheet, PDF (20/26 Pages) Texas Instruments – 10-BIT 165-MSPS DIGITAL-TO-ANALOG CONVERTER

DAC900-Q1
SBAS505 – JUNE 2010
www.ti.com
External Reference Operation
The internal reference can be disabled by applying a logic HIGH (+V_A) to pin INT/EXT. An external reference
voltage can then be driven into the REF_IN pin, which in this case functions as an input, as shown in Figure 8. The
use of an external reference may be considered for applications that require higher accuracy and drift
performance, or to add the ability of dynamic gain control.
While a 0.1mF capacitor is recommended to be used with the internal reference, it is optional for the external
reference operation. The reference input, REF_IN, has a high input impedance (1MΩ) and can easily be driven by
various sources. Note that the voltage range of the external reference should stay within the compliance range of
the reference input (0.1V to 1.25V).
C_COMPEXT ^+5V
0.1µF
External
Reference
I_REF
=
V_REF
R_SET
DAC900
FSA
REF_IN
Ref
Control
Amp
R_{SET +5V}
INT/EXT
BW
+V_A
Current
Sources
C_COMP
400pF
+1.24V Ref.
Figure 8. External Reference Configuration
Digital Inputs
The digital inputs, D0 (LSB) through D9 (MSB) of the DAC900 accepts standard-positive binary coding. The
digital input word is latched into a master-slave latch with the rising edge of the clock. The DAC output becomes
updated with the following falling clock edge (refer to the specification table and timing diagram for details). The
best performance will be achieved with a 50% clock duty cycle, however, the duty cycle may vary as long as the
timing specifications are met. Additionally, the setup and hold times may be chosen within their specified limits.
All digital inputs are CMOS compatible. The logic thresholds depend on the applied digital supply voltage such
that they are set to approximately half the supply voltage; V_th = +V_D/2 (±20% tolerance). The DAC900 is
designed to operate over a supply range of 2.7V to 5.5V.
Power-Down Mode
The DAC900 features a power-down function that can be used to reduce the supply current to less than 9mA
over the specified supply range of 2.7V to 5.5V. Applying a logic HIGH to the PD pin will initiate the power-down
mode, while a logic LOW enables normal operation. When left unconnected, an internal active pull-down circuit
will enable the normal operation of the converter.
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