DAC900-Q1 Datasheet, PDF (13/26 Pages) Texas Instruments – 10-BIT 165-MSPS DIGITAL-TO-ANALOG CONVERTER

DAC900-Q1
www.ti.com
SBAS505 – JUNE 2010
APPLICATION INFORMATION
Theory of Operation
The architecture of the DAC900 uses the current steering technique to enable fast switching and a high update
rate. The core element within the monolithic DAC is an array of segmented current sources, which are designed
to deliver a full-scale output current of up to 20mA, as shown in Figure 1. An internal decoder addresses the
differential current switches each time the DAC is updated and a corresponding output current is formed by
steering all currents to either output summing node, I_OUT or I_OUT. The complementary outputs deliver a differential
output signal that improves the dynamic performance through reduction of even-order harmonics, common-mode
signals (noise), and double the peak-to-peak output signal swing by a factor of two, compared to singleended
operation.
Full-Scale
Adjust
Resistor
R_SET
2kΩ
+3V to +5V
Analog
0.1µF
+3V to +5V
Digital
Bandwidth
Control
DAC900 +V_A
BW
+V_D
I_OUT
FSA
Ref
Input REF_IN
Ref
Control
Amp
0.1µF
INT/EXT _Ref
400pF
PMOS
Current
Source
Array
LSB
Switches
I_OUT
Segmented
MSB
Switches
50Ω
0.1µF
BYP
20pF 50Ω
Buffer
Latches and Switch
+1.24V Ref
Decoder Logic
PD
Power Down
(internal pull-down)
AGND
CLK
10-Bit Data Input _DGND
Analog
Ground
Clock
Input
D9...D0
Digital
Ground
1:1
V_OUT
20pF
NOTE: Supply bypassing not shown.
Figure 1. Functional Block Diagram
The segmented architecture results in a significant reduction of the glitch energy, and improves the dynamic
performance (SFDR) and DNL. The current outputs maintain a very high output impedance of greater than
200kΩ.
The full-scale output current is determined by the ratio of the internal reference voltage (1.24V) and an external
resistor, R_SET. The resulting I_REF is internally multiplied by a factor of 32 to produce an effective DAC output
current that can range from 2mA to 20mA, depending on the value of R_SET.
The DAC900 is split into a digital and an analog portion, each of which is powered through its own supply pin.
The digital section includes edge-triggered input latches and the decoder logic, while the analog section
comprises the current source array with its associated switches and the reference circuitry.
Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): DAC900-Q1
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