CD4051B_15 Datasheet, PDF (20/38 Pages) Texas Instruments – CMOS Single 8-Channel Analog Multiplexer/Demultiplexer

CD4051B, CD4052B, CD4053B
SCHS047H – AUGUST 1998 – REVISED APRIL 2015
www.ti.com
Typical Application (continued)
9.2.2 Detailed Design Procedure
1. Recommended Input Conditions
– For switch time specifications, see propagation delay times in Electrical Characteristics.
– Inputs should not be pushed more than 0.5 V above V_DD or below V_EE.
– For input voltage level specifications for control inputs, see V_IH and V_IL in Electrical Characteristics.
2. Recommended Output Conditions
– Outputs should not be pulled above V_DD or below V_EE.
3. Input/output current consideration: The CD405xB series of parts do not have internal current drive circuitry
and thus cannot sink or source current. Any current will be passed through the device.
9.2.3 Application Curve
6
V_DD = 5V
V_SS = 0V
4
V_EE = -5V
T_A = 25^oC
2
R_L = 100kΩ, R_L = 10kΩ
1kΩ
500Ω
100Ω
0
-2
-4
-6
-6
-4
-2
0
2
4
6
V_IS, INPUT SIGNAL VOLTAGE (V)
Figure 29. ON Characteristics for 1 of 8 Channels
(CD4051B)
10 Power Supply Recommendations
The power supply can be any voltage between the minimum and maximum supply voltage rating located in the
Electrical Characteristics.
Each V_CC terminal should have a good bypass capacitor to prevent power disturbance. For devices with a single
supply, a 0.1-μF bypass capacitor is recommended. If there are multiple pins labeled V_CC, then a 0.01-μF or
0.022-μF capacitor is recommended for each V_CC because the V_CC pins will be tied together internally. For
devices with dual supply pins operating at different voltages, for example V_CC and V_DD, a 0.1-µF bypass
capacitor is recommended for each supply pin. It is acceptable to parallel multiple bypass capacitors to reject
different frequencies of noise. 0.1-μF and 1-μF capacitors are commonly used in parallel. The bypass capacitor
should be installed as close to the power terminal as possible for best results.
11 Layout
11.1 Layout Guidelines
Reflections and matching are closely related to loop antenna theory, but different enough to warrant their own
discussion. When a PCB trace turns a corner at a 90° angle, a reflection can occur. This is primarily due to the
change of width of the trace. At the apex of the turn, the trace width is increased to 1.414 times its width. This
upsets the transmission line characteristics, especially the distributed capacitance and self–inductance of the
trace — resulting in the reflection. It is a given that not all PCB traces can be straight, and so they will have to
turn corners. Figure 30 shows progressively better techniques of rounding corners. Only the last example
maintains constant trace width and minimizes reflections.
20
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