LMC6953 Datasheet, PDF (2/19 Pages) National Semiconductor (TI) – PCI Local Bus Power Supervisor

LMC6953
SNVS132D – APRIL 1998 – REVISED APRIL 2013
Connection Diagram
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Figure 3. 8–Pin SOIC
Top View
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ABSOLUTE MAXIMUM RATINGS⁽¹⁾⁽²⁾
ESD Tolerance ⁽³⁾
Human Body Model
Machine Model
Voltage at Input Pin
Supply Voltage
Current at Output Pin
Current at Power Supply Pin ⁽⁴⁾
Lead Temp. (Soldering, 10 sec.)
Storage Temperature Range
Junction Temperature
2 kV
200V
7V
7V
15 mA
10 mA
260°C
−65°C to +150°C
150°C
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test
conditions, see DC ELECTRICAL CHARACTERISTICS and AC ELECTRICAL CHARACTERISTICS.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
(3) Human body model, 1.5 kΩ in series with 100 pF. Machine model. 200Ω in series with 100 pF.
(4) Supply current measured at pins 1, 2, and 3. The 4.7 kΩ pull-up resistor on pin 7 is not tied to V_DDin this measurement.
OPERATING RATINGS⁽¹⁾
Supply Voltage
Junction Temperature Range
LMC6953C
Thermal Resistance (θ_JA)
D Package
1.5V to 6V
−40°C to +85°C
165°C/W
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test
conditions, see DC ELECTRICAL CHARACTERISTICS and AC ELECTRICAL CHARACTERISTICS.
2
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