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LMC6024 Datasheet, PDF (2/22 Pages) National Semiconductor (TI) – Low Power CMOS Quad Operational Amplifier
LMC6024
SNOS621D – AUGUST 2000 – REVISED MARCH 2013
www.ti.com
Absolute Maximum Ratings (1)(2)
Differential Input Voltage
Supply Voltage (V+ − V−)
Lead Temperature
Storage Temperature Range
Voltage at Output/Input Pin
Current at Input Pin
Current at Output Pin
Current at Power Supply Pin
Output Short Circuit to V+
Output Short Circuit to V−
Junction Temperature
ESD Tolerance(5)
Power Dissipation
Soldering, 10 sec.
±Supply Voltage
16V
260°C
−65°C to +150°C
(V+) + 0.3V, (V−) − 0.3V
±5 mA
±18 mA
35 mA
See (3)
See (4)
150°C
1000V
See (6)
(1) Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test
conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
(3) Do not connect output to V+ when V+ is greater than 13V or reliability may be adversely affected.
(4) Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature and/or
multiple Op Amp shorts can result in exceeding the maximum allowed junction temperature of 150°C. Output currents in excess of ±30
mA over long term may adversly affect reliability.
(5) Human body model, 100 pF discharge through a 1.5 kΩ resistor.
(6) The maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any ambient
temperature is PD = (TJ(max) − TA)/θJA.
Operating Ratings
Temperature Range
Supply Voltage Range
Power Dissipation
Thermal Resistance (θJA)(2)
14-Pin DIP
14-Pin SOIC
−40°C ≤ TJ ≤ +85°C
4.75V to 15.5V
See (1)
85°C/W
115°C/W
(1) For operating at elevated temperatures the device must be derated based on the thermal resistance θJA with PD = (TJ − TA)/θJA.
(2) All numbers apply for packages soldered directly into a PC board.
2
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