LM34927SD Datasheet, PDF (2/26 Pages) Texas Instruments – LM34927 Integrated Secondary Side Bias Regulator for Isolated DC-DC Converters

LM34927
SNVS799F – APRIL 2012 – REVISED DECEMBER 2013
Connection Diagram
www.ti.com
RTN 1
VIN 2
UVLO 3
RON 4
SO
PowerPAD-8
Exp Pad
8 SW
7 BST
6 VCC
5 FB
RTN 1
VIN 2
UVLO 3
RON 4
WSON-8
Exp Pad
8 SW
7 BST
6 VCC
5 FB
Figure 2. Top View (Connect Exposed Pad to RTN) Figure 3. Top View (Connect Exposed Pad to RTN)
Table 1. Pin Descriptions
Pin
Name
Description
Application Information
1
RTN
Ground
Ground connection of the integrated circuit.
2
V_IN
Input Voltage
Operating input range is 7.5 V to 100 V.
3
UVLO
Input Pin of Undervoltage
Resistor divider from V_IN to UVLO to GND programs the undervoltage
Comparator
detection threshold. An internal current source is enabled when UVLO
is above 1.225V to provide hysteresis. When UVLO pin is pulled below
0.66V externally, the parts goes in shutdown mode.
4
R_ON
On-Time Control
A resistor between this pin and V_IN sets the switch on-time as a
function of V_IN. Minimum recommended on-time is 100 ns at max input
voltage.
5
FB
Feedback
This pin is connected to the inverting input of the internal regulation
comparator. The regulation level is 1.225 V.
6
V_CC
Output from the Internal High
The internal V_CC regulator provides bias supply for the gate drivers and
Voltage Series Pass Regulator. other internal circuitry. A 1.0 μF decoupling capacitor is recommended.
Regulated at 7.6 V.
7
BST
Bootstrap Capacitor
An external capacitor is required between the BST and SW pins (0.01
μF ceramic). The BST pin capacitor is charged by the V_CC regulator
through an internal diode when the SW pin is low.
8
SW
Switching Node
Power switching node. Connect to the output inductor and bootstrap
capacitor.
Exp Pad Exposed Pad
Exposed pad must be connected to RTN pin. Connect to system
ground plane on application board for reduced thermal resistance.
2
Submit Documentation Feedback
Product Folder Links: LM34927
Copyright © 2012–2013, Texas Instruments Incorporated