LM34927SD Datasheet, PDF (16/26 Pages) Texas Instruments – LM34927 Integrated Secondary Side Bias Regulator for Isolated DC-DC Converters

LM34927
SNVS799F – APRIL 2012 – REVISED DECEMBER 2013
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Layout Recommendation
A proper layout is essential for optimum performance of the circuit. In particular, the following guidelines should
be observed:
1. C_IN: The loop consisting of input capacitor (C_IN), V_IN pin, and RTN pin carries switching currents. Therefore
the input capacitor should be placed close to the IC, directly across V_IN and RTN pins and the connections to
these two pins should be direct to minimize the loop area. In general it is not possible to accommodate all of
input capacitance near the IC. A good practice is to use a 0.1μF or 0.47μF capacitor directly across the V_IN
and RTN pins close to the IC, and the remaining bulk capacitor as close as possible (see Figure 20
Placement of Bypass Capacitors).
2. C_VCC and C_BST: The V_CC and bootstrap (BST) bypass capacitors supply switching currents to the high and
low side gate drivers. These two capacitors should also be placed as close to the IC as possible, and the
connecting trace lengths and loop area should be minimized (See Figure 20).
3. The Feedback trace carries the output voltage information and a small ripple component that is necessary for
proper operation of LM34927. Therefore care should be taken while routing the feedback trace so avoid
coupling any noise to this pin. In particular, feedback trace should not run close to magnetic components, or
parallel to any other switching trace.
4. SW trace: SW node switches rapidly between V_IN and GND every cycle and is therefore a possible source of
noise. SW node area should be minimized. In particular SW node should not be inadvertently connected to a
copper plane or pour.
RTN 1
C_IN
VIN 2
UVLO 3
RON 4
SO
PowerPAD-8
8 SW
7 BST
6 VCC
5 FB ^CVCC
Figure 20. Placement of Bypass Capacitors
Typical Buck Configuration
12V-100V
VIN
(TP1)
C4 ⁺ C4 ⁺ R5
2.2F
0.47F ^127NŸ
GND
(TP2)
(TP4)
UVLO/SD
R7
14NŸ
SW
(TP6)
LM34927
2
VIN
7
BST
4
RON
SW ⁸
R3
301NŸ ₃
UVLO
EXP
VCC
6
RTN
1
FB
5
U1
0.01F
+
220H 0 Ÿ
C1
L1
R8
R4
46.4NŸ
D2
+
C7
1F
C6 _3300pF
C8
0.1F
R1
10NŸ
R6
15.4NŸ
VOUT
(TP3)
R2
0Ÿ
C2
+
C9
22F
GND
(TP5)
Figure 21. Typical Buck Configuration:
Vin = 9 V to 100 V, Vout = 3.3 V, Iout = 500 mA
16
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