CD74ACT86-EP Datasheet, PDF (2/11 Pages) Texas Instruments – QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE

CD74ACT86-EP
QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE
SCHS357 – MARCH 2006
www.ti.com
Exclusive-OR Logic
An exclusive-OR gate has many applications, some of which can be represented better by alternative logic
symbols.
EXCLUSIVE OR
=1
These are five equivalent exclusive-OR symbols valid for an CD74ACT86-EP gate in positive logic; negation may be shown at any two ports.
LOGIC-IDENTITY ELEMENT
=
EVEN-PARITY ELEMENT
2k
ODD-PARITY ELEMENT
2k + 1
The output is active (low) if
all inputs stand at the same
logic level (i.e., A = B).
The output is active (low) if
an even number of inputs
(i.e., 0 or 2) are active.
The output is active (high) if
an odd number of inputs
(i.e., only 1 of the 2) are
active.
Absolute Maximum Ratings⁽¹⁾
over operating free-air temperature range (unless otherwise noted)
V_CC Supply voltage range
I_IK
Input clamp current⁽²⁾
I_OK
Output clamp current⁽²⁾
I_O
Continuous output current
Continuous current through V_CC or GND
θ_JA
Package thermal impedance⁽³⁾
T_stg Storage temperature range
V_I < 0 or V_I > V_CC
V_O < 0 or V_O > V_CC
V_O = 0 to V_CC
MIN
MAX UNIT
–0.5
6V
±20 mA
±50 mA
±50 mA
±100 mA
86 °C/W
–65
150 °C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
(3) The package thermal impedance is calculated in accordance with JESD 51-7.
Recommended Operating Conditions⁽¹⁾
V_CC
V_IH
V_IL
V_I
V_O
I_OH
I_OL
∆t/∆v
Supply voltage
High-level input voltage
Low-level input voltage
Input voltage
Output voltage
High-level output current
Low-level output current
Input transition rise or fall rate
T_A = 25°C
MIN
MAX
4.5
5.5
2
0.8
0
V_CC
0
V_CC
–24
24
10
–55°C to
125°C
MIN MAX
4.5
5.5
2
0.8
0
V_CC
0
V_CC
–24
24
10
UNIT
V
V
V
V
V
mA
mA
ns/V
(1) All unused inputs of the device must be held at V_CC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
2
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