BQ2012_15 Datasheet, PDF (2/26 Pages) Texas Instruments – Gas Gauge IC With Slow-Charge Control

Not Recommended For New Designs
bq2012
Pin Descriptions
LCOM LED common output
Open-drain output switches VCC to source
current for the LEDs. The switch is off dur-
ing initialization to allow reading of the soft
pull-up or pull-down program resistors.
LCOM is also high impedance when the dis-
play is off.
SEG1–
SEG6
LED display segment outputs (dual func-
tion with PROG1–PROG6)
Each output may activate an LED to sink
the current sourced from LCOM.
PROG1– Programmed full count selection inputs
PROG2 (dual function with SEG1–SEG2)
These three-level input pins define the pro-
grammed full count (PFC) thresholds de-
scribed in Table 2.
PROG3– Gas gauge rate selection inputs (dual
PROG4 function with SEG3–SEG4)
These three-level input pins define the scale
factor described in Table 2.
PROG5 Self-discharge rate selection (dual func-
tion with SEG5)
This three-level input pin defines the selfdis-
charge compensation rate shown in Table 1.
PROG6 Display mode selection (dual function
with SEG6)
This three-level pin defines the display op-
eration shown in Table 1.
CHG
Charge control output
This open-drain output becomes active low
when charging is allowed. Valid charging
conditions are described in the Charge Con-
trol section.
SR
DISP
SB
EMPTY
DQ
REF
VCC
VSS
Sense resistor input
The voltage drop (VSR) across the sense re-
sistor RS is monitored and integrated over
time to interpret charge and discharge activ-
ity. The SR input is tied to the high side of
the sense resistor. VSR < VSS indicates dis-
charge, and VSR > VSS indicates charge. The
effective voltage drop (VSRO) as seen by the
bq2012 is VSR + VOS (see Table 5).
Display control input
DISP high disables the LED display. DISP
tied to VCC allows PROGX to connect directly
to VCC or VSS instead of through a pull-up or
pull-down resistor. DISP floating allows the
LED display to be active during a valid
charge or during discharge if the NAC regis-
ter is updated at a rate equivalent to VSRO ≤
-4mV. DISP low activates the display. See
Table 1.
Secondary battery input
This input monitors the single-cell voltage
potential through a high-impedance resis-
tive divider network for end-of-discharge
voltage (EDV) thresholds, maximum charge
voltage (MCV), and battery removed.
Battery empty output
This open-drain output becomes high-
impedance on detection of a valid end-of-
discharge voltage (VEDVF) and is low following
the next application of a valid charge.
Serial I/O pin
This is an open-drain bidirectional pin.
Voltage reference output for regulator
REF provides a voltage reference output for
an optional micro-regulator.
Supply voltage input
Ground
2