AMC1204 Datasheet, PDF (19/29 Pages) Texas Instruments – 20MHz, Second-Order, Isolated Delta-Sigma Modulator for Current-Shunt Measurement

AMC1204
www.ti.com
SBAS512A – APRIL 2011 – REVISED APRIL 2011
In a sinc³ filter response (shown in Figure 46 and Figure 47), the location of the first notch occurs at the
frequency of output data rate f_DATA = f_CLK/OSR. The –3dB point is located at half the Nyquist frequency or f_DATA/4.
For some applications, it may be necessary to use another filter type with different frequency response.
Performance can be improved, for example, by using a cascaded filter structure. The first decimation stage could
be built of a sinc³ filter with a low OSR and the second stage using a high-order filter.
0
30k
f_DATA = 20MHz/64 = 312.5kHz
f_MOD = 20MHz
-10
-3dB: 81.9kHz
OSR = 64
OSR = 64
25k _{FSR = 32768}
-20
ENOB = 12 Bits
-30
20k Settling Time =
3 ´ 1/f_DATA = 9.6ms
-40
15k
-50
10k
-60
5k
-70
-80
0
200 400 600 800 1000 1200 1400 1600
Frequency (kHz)
Figure 46. Frequency Response of the Sinc³ Filter
0
0
5 10 15 20 25 30 35 40
Number of Output Clocks
Figure 47. Pole Response of the Sinc³ Filter
The effective number of bits (ENOB) is often used to compare the performance of ADCs and ΔΣ modulators.
Figure 48 illustrates the ENOB of the AMC1204 with different oversampling ratios. In this data sheet, this number
is calculated from SNR using Equation 2:
SNR = 1.76dB + 6.02dB ´ ENOB
(2)
In motor control applications, a very fast response time for overcurrent detection is required. The time for fully
settling the filter depends on its order; that is, a sinc³ filter requires three data clocks for full settling (with f_DATA =
f_CLK/OSR). Therefore, for overcurrent protection, filter types other than sinc³ might be a better choice; an
alternative is the sinc² filter. Figure 49 compares the settling times of different filter orders with sincfast being a
modified sinc² filter with behavior as shown in Equation 3.
2
H(z) =
1 - z^-OSR
1 - z^-1
(1
+
z ) ^-2OSR
(3)
16
sinc³
16
14
sincfast
14
sinc³
sincfast
12
12
sinc²
10
10
sinc²
8
8
6
6
sinc¹
sinc¹
4
4
2
2
0
0
1
10
100
1000
0 1 2 3 4 5 6 7 8 9 10 11 12 13
OSR
Settling Time (ms)
Figure 48. Measured Effective Number of Bits
versus Oversampling Ratio
Figure 49. Measured Effective Number of Bits
versus Settling Time
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): AMC1204
Submit Documentation Feedback
19