English
Language : 

ADS5263 Datasheet, PDF (19/69 Pages) Texas Instruments – Quad Channel 16-Bit, 100-MSPS High-SNR ADC 4 Vpp Full-scale Input
◁
www.ti.com
ADS5263
SLAS760A – MAY 2011 – REVISED AUGUST 2011
SERIAL REGISTER MAP
Register
Address
A7-A0 in
HEX
D15
0
0
1
0
2
0
F
0
11
0
12
0
14
0
25
0
26
27
<EN WORD-
28
WISE
CONTROL>
29
0
2A
2C
0
2E
0
2F
0
30
0
31
0
45
0
46
<EN SERIALI
ZATION>
50
<EN MAP1>
51
<EN MAP2>
52
<EN MAP3>
Table 7. Summary of Functions Supported by Serial Interface(1)
Register Data(2)
D14
D13
D12
0
0
0
0
0
0
0
<EN SYNC> 0
0
0
0
0
0
0
<ENABLE
LVDS
0
0
TERM>
0
0
0
0
0
0
0
0
0
<GAIN CH4>
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
0
0
0
0
0
0
0
0
0
0
0
<RESET>
0
0
0
0
0
0
0
0
0
0
0
<READOUT>
0
0
0
0
0
0
0
0
0
0
0
0
0
<CONFIG
PD PIN>
<GLOBAL <STANDBY <PDN
PDN>
>
CH 4B>
<PDN
CH 3B>
<PDN
CH 2B>
<PDN
CH 1B>
<PDN
CH 4A>
<PDN
CH 3A>
<PDN
CH 2A>
<PDN
CH 1A>
0
<LVDS CURR DATA>
0
<LVDS CURR ADCLK>
0
<LVDS CURR LCLK>
0
<LVDS TERM DATA>
0
<LVDS TERM ADCLK>
0
<LVDS TERM LCLK>
0
0
0
0
0
0
0
0
0
<16X
SERIALI
ZATION>
0
0
0
0
0
0
0
0
0
CUSTOM PATTERN A DATA[13..0]
CUSTOM PATTERN B DATA[13..0]
0
0
<RAMP
TEST
PATTERN>
<DUAL
CUSTOM
PATTERN>
0
<SINGLE
CUSTOM
PATTERN>
<EN LFNS <EN LFNS
CH 4>
CH 3>
CUSTOM PATTERN B
DATA[15...14]
<EN LFNS
CH 2>
<EN LFNS
CH 1>
CUSTOM PATTERN A
DATA[15...14]
0
0
0
0
<WORD-
<WORD-
<WORD- <WORD-WISE
WISE CH4 WISE CH3> WISE CH2>
CH1>
0
0
0
0
0
0
0
<GAIN CH3>
<GAIN CH2>
0
0
0
<AVG OUT 4>
<AVG OUT 3>
0
<FILTER TYPE CH1>
<DEC by RATE CH1>
0
<FILTER TYPE CH2>
<DEC by RATE CH2>
0
<FILTER TYPE CH3>
<DEC by RATE CH3>
0
<FILTER TYPE CH4>
<DEC by RATE CH4>
0
0
0
<14x
SERIALI
0
0
ZATION>
<MAP_Ch1234_OUT2A>
<MAP_Ch1234_OUT3B>
0
0
0
0
0
0
0
0
0
<PAD two
0s>
0
<MAP_Ch1234_OUT1B>
<MAP_Ch1234_OUT3A>
<MAP_Ch1234_OUT4B>
0
0
<EN DIG
FILTER>
<EN AVG>
<GAIN CH1>
<AVG OUT 2>
<AVG OUT 1>
0
<ODD TAP
CH1>
0
<USE FILTER
CH1>
0
<ODD TAP
CH2>
0
<USE FILTER
CH2>
0
<ODD TAP
CH3>
0
<USE FILTER
CH3>
0
<ODD TAP
CH4>
0
<USE FILTER
CH4>
0
0
<SYNC
PATTERN>
<DESKEW
PATTERN>
<MSB
FIRST>
<2S
COMPL>
0
<2-WIRE 0.5X
FRAME>
<MAP_Ch1234_OUT1A>
<MAP_Ch1234_OUT2B>
<MAP_Ch1234_OUT4A>
(1) Multiple functions in a register can be programmed in a single write operation.
(2) All registers are cleared to zero after software or hardware reset is applied.
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s) :ADS5263
Submit Documentation Feedback
19
 ▷