LMC6035 Datasheet, PDF (18/29 Pages) National Semiconductor (TI) – Low Power 2.7V Single Supply CMOS Operational Amplifiers

LMC6035, LMC6035-Q1, LMC6036
SNOS875G – JANUARY 2000 – REVISED APRIL 2013
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The load capacitance interacts with the op amp's output resistance to create an additional pole. If this pole
frequency is sufficiently low, it will degrade the op amp's phase margin so that the amplifier is no longer stable at
low gains. As shown in Figure 52, the addition of a small resistor (50Ω–100Ω) in series with the op amp's output,
and a capacitor (5pF–10pF) from inverting input to output pins, returns the phase margin to a safe value without
interfering with lower-frequency circuit operation. Thus, larger values of capacitance can be tolerated without
oscillation. Note that in all cases, the output will ring heavily when the load capacitance is near the threshold for
oscillation.
DSBGA Considerations
Contrary to what might be guessed, the DSBGA package does not follow the trend of smaller packages having
higher thermal resistance. LMC6035 in DSBGA has thermal resistance of 220°C/W compared to 230°C/W in
VSSOP. Even when driving a 600Ω load and operating from ±7.5V supplies, the maximum temperature rise will
be under 4.5°C. For application information specific to DSBGA, see Application note AN-1112 (Literature Number
SNVA009).
Figure 52. Rx, Cx Improve Capacitive Load Tolerance
Capacitive load driving capability is enhanced by using a pull up resistor to V⁺ (Figure 53). Typically a pull up
resistor conducting 500μA or more will significantly improve capacitive load responses. The value of the pull up
resistor must be determined based on the current sinking capability of the amplifier with respect to the desired
output swing. Open loop gain of the amplifier can also be affected by the pull up resistor (see Electrical
Characteristics).
Figure 53. Compensating for Large Capacitive Loads with a Pull Up Resistor
Connection Diagrams
Top View
Top View
Figure 54. 8-Pin SOIC or VSSOP Package
See Package Number D0008A or DGK0008A
Figure 55. 14-Pin SOIC or TSSOP Package
See Package Number D0014A or PW0014A
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