LM3424 Datasheet, PDF (18/69 Pages) National Semiconductor (TI) – Constant Current N-Channel Controller with Thermal Foldback for Driving LEDs

LM3424, LM3424-Q1
SNVS603C – AUGUST 2009 – REVISED AUGUST 2015
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Feature Description (continued)
7.3.7 Control Loop Compensation
The LM3424 control loop is modeled like any current mode controller. Using a first order approximation, the
uncompensated loop can be modeled as a single pole created by the output capacitor and, in the boost and
buck-boost topologies, a right half plane zero created by the inductor, where both have a dependence on the
LED string dynamic resistance. There is also a high frequency pole in the model, however it is near the switching
frequency and plays no part in the compensation design process therefore it will be neglected. Since ceramic
capacitance is recommended for use with LED drivers due to long lifetimes and high ripple current rating, the
ESR of the output capacitor can also be neglected in the loop analysis. Finally, there is a DC gain of the
uncompensated loop which is dependent on internal controller gains and the external sensing network.
A buck-boost regulator will be used as an example case. See the Application Information section for
compensation of all topologies.
The uncompensated loop gain for a buck-boost regulator is given by the following equation:
¨¨©§^{1 -}
s
Z
Z1
¸¸¹·
T_U
=
T_U0
x
¨¨©§¹⁺
s
Z
P1
¸¸¹·
(14)
Where the uncompensated DC loop gain of the system is described as:
T_U0
=
D?x 500V x R_CSH x R_SNS
(1+ D) x R_HSP x R_LIM
=
D? x 620V
(1+ D) x I_LED x R_LIM
(15)
3 ^{And the output pole (ωP1) is approximated:}
Z_P1 =
1+D
r_D x C_O
(16)
And the right half plane zero (ω_Z1) is:
Z_Z1
=
r_D x Dc²
D xL1
(17)
100
ö_P1
135
80
ö_Z1
90
GAIN
60
45
40
PHASE
20
0
0
-45
0° Phase Margin
-90
-20
-135
-40
-180
-60
1e-1
1e1
1e3
1e5
FREQUENCY (Hz)
-225
1e7
Figure 24. Uncompensated Loop Gain Frequency Response
18
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