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TMS320F2810 Datasheet, PDF (17/172 Pages) Texas Instruments – Digital Signal Processors
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TMS320F2810, TMS320F2811, TMS320F2812
TMS320C2810, TMS320C2811, TMS320C2812
www.ti.com
SPRS174T – APRIL 2001 – REVISED MAY 2012
2.4 Signal Descriptions
Table 2-2 specifies the signals on the F281x and C281x devices. All digital inputs are TTL-compatible. All
outputs are 3.3 V with CMOS levels. Inputs are not 5-V tolerant. A 100-µA (or 20-µA) pullup/pulldown is
used.
Table 2-2. Signal Descriptions(1)
NAME
XA[18]
XA[17]
XA[16]
XA[15]
XA[14]
XA[13]
XA[12]
XA[11]
XA[10]
XA[9]
XA[8]
XA[7]
XA[6]
XA[5]
XA[4]
XA[3]
XA[2]
XA[1]
XA[0]
XD[15]
XD[14]
XD[13]
XD[12]
XD[11]
XD[10]
XD[9]
XD[8]
XD[7]
XD[6]
XD[5]
XD[4]
XD[3]
XD[2]
XD[1]
XD[0]
179-BALL
GHH/ZHH
D7
B7
A8
B9
A10
E10
C11
A14
C12
D14
E12
F12
G14
H13
J12
M11
N10
M2
G5
A9
B11
J10
L14
N9
L9
M8
P7
L5
L3
J5
K3
J3
H5
H3
G3
PIN NO.
176-PIN
PGF
128-PIN
PBK
I/O/Z(2) PU/PD(3)
XINTF SIGNALS (2812 ONLY)
158
–
O/Z
–
156
–
O/Z
–
152
–
O/Z
–
148
–
O/Z
–
144
–
O/Z
–
141
–
O/Z
–
138
–
O/Z
–
132
–
O/Z
–
130
–
O/Z
–
125
–
O/Z
–
121
–
O/Z
–
118
–
O/Z
–
111
–
O/Z
–
108
–
O/Z
–
103
–
O/Z
–
85
–
O/Z
–
80
–
O/Z
–
43
–
O/Z
–
18
–
O/Z
–
147
–
I/O/Z
PU
139
–
I/O/Z
PU
97
–
I/O/Z
PU
96
–
I/O/Z
PU
74
–
I/O/Z
PU
73
–
I/O/Z
PU
68
–
I/O/Z
PU
65
–
I/O/Z
PU
54
–
I/O/Z
PU
39
–
I/O/Z
PU
36
–
I/O/Z
PU
33
–
I/O/Z
PU
30
–
I/O/Z
PU
27
–
I/O/Z
PU
24
–
I/O/Z
PU
21
–
I/O/Z
PU
DESCRIPTION
19-bit XINTF Address Bus
16-bit XINTF Data Bus
(1) Typical drive strength of the output buffer for all pins is 4 mA except for TDO, XCLKOUT, XF, XINTF, EMU0, and EMU1 pins, which are
8 mA.
(2) I = Input, O = Output, Z = High impedance
(3) PU = pin has internal pullup; PD = pin has internal pulldown. Pullup/pulldown strength is given in Section 6.3, Electrical Characteristics
Over Recommended Operating Conditions. The pullups/pulldowns are enabled in boundary scan mode.
Copyright © 2001–2012, Texas Instruments Incorporated
Introduction
17
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