TLC2932_15 Datasheet, PDF (17/29 Pages) Texas Instruments – HIGH-PERFORMANCE PHASE-LOCKED LOOP

TLC2932
HIGH-PERFORMANCE PHASE-LOCKED LOOP
SLAS097E – SEPTEMBER 1994 – REVISED MAY 1997
APPLICATION INFORMATION
basic design example (continued)
Assume the loop has to have a 100 µs settling time (t_s) with a countdown N = 8. Using the Type 1, second order
response curves of Figure 26, a value of 4.5 radians is selected for ω_nt_s with a damping factor of 0.7. This
selection gives a good combination for settling time, accuracy, and loop gain margin. The initial parameters are
summarized in Table 5. The loop constants, K_V and K_p, are calculated from the data sheet specifications and
Table 6 shows these values.
The natural loop frequency is calculated as follows:
Since
+ w_nts 4.5
Then
+ + ń w_n
4.5
100 ms
45 k-radians sec
Table 5. Design Parameters
PARAMETER
Division factor
Lockup time
Radian value to selected lockup time
Damping factor
SYMBOL
N
t
ω_nt
ζ
VALUE
8
100
4.5
0.7
UNITS
µs
rad
Table 6. Device Specifications
PARAMETER
VCO gain
fMAX
fMIN
VIN _MAX
VIN _MIN
PFD gain
SYMBOL
KV
Kp
VALUE
76.6
70
20
5
0.9
0.342357
UNITS
Mrad/V/s
MHz
MHz
V
V
V/rad
Table 7. Calculated Values
PARAMETER
Natural angular frequency
K = (KV • Kp)/N
Lag-lead filter
Calculated value
Nearest standard value
Calculated value
Nearest standard value
Selected value
SYMBOL
ω_n
R1
R2
C1
VALUE
45000
3.277
15870
16000
308
300
0.1
UNITS
rad/sec
Mrad/sec
Ω
Ω
µF
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