OPA2677IDDA Datasheet, PDF (17/38 Pages) Texas Instruments – Dual, Wideband, High Output Current Operational Amplifier

the line and transformer turns ratio. As this turns ratio
changes, the minimum allowed supply voltage changes along
with it. The peak current in the amplifier output is given by:
±I_P
=
1_•
2
2 • V_LPP
n
•
1
4R_M
(8)
with V_PP as defined in Equation 7, and R_M as defined in
Equation 2 and shown in Figure 8.
R_M
V_pp =
2V_Lpp
n
V_Lpp
n
R_M
R_L
V_Lpp
TOTAL DRIVER POWER FOR xDSL APPLICATIONS
The total internal power dissipation for the OPA2677 in an
xDSL line driver application will be the sum of the quiescent
power and the output stage power. The OPA2677 holds a
relatively constant quiescent current versus supply voltage—
giving a power contribution that is simply the quiescent
current times the supply voltage used (the supply voltage will
be greater than the solution given in Equation 10). The total
output stage power may be computed with reference to
Figure 10.
+V_CC
I_AVG
=
I_P
CF
FIGURE 8. Driver Peak Output Voltage.
With the previous information available, it is now possible to
select a supply voltage and the turns ratio desired for the
transformer as well as calculate the headroom for the
OPA2677.
The model, shown in Figure 9, can be described with the
following set of equations:
1) As available output swing:
V_PP = V_CC – (V₁ + V₂) – I_P • (R₁ + R₂)
(9)
2) Or as required supply voltage:
V_CC = V_PP + (V₁ + V₂) + I_P • (R₁ + R₂)
(10)
The minimum supply voltage for a power and load require-
ment is given by Equation 10.
+V_CC
R₁
V₁
V_O
I_P
V₂
R₂
FIGURE 9. Line Driver Headroom Model.
V₁, V₂, R₁, and R₂ are given in Table I for both +12V and +5V
operation.
V₁
R₁
V₂
R₂
+5V
0.9V
5Ω
0.8V
5Ω
+12V
0.9V
2Ω
0.9V
2Ω
TABLE I. Line Driver Headroom Model Values.
R_T
FIGURE 10. Output Stage Power Model.
The two output stages used to drive the load of Figure 8 can
be seen as an H-Bridge in Figure 10. The average current
drawn from the supply into this H-Bridge and load will be the
peak current in the load given by Equation 8 divided by the
crest factor (CF) for the xDSL modulation. This total power
from the supply is then reduced by the power in R_T to leave
the power dissipated internal to the drivers in the four output
stage transistors. That power is simply the target line power
used in Equation 3 plus the power lost in the matching
elements (R_M). In the examples here, a perfect match is
targeted giving the same power in the matching elements as
in the load. The output stage power is then set by Equation 11.
P_OUT =
I_P
CF
×
V_CC
–
2P_L
(11)
The total amplifier power is then:
P_TOT
=
I_q
×
V_CC
+
I_P
CF
×
V_CC
–
2P_L
(12)
For the ADSL CPE upstream driver design of Figure 6, the
peak current is 128mA for a signal that requires a crest factor
of 5.33 with a target line power of 13dBm into 100Ω (20mW).
With a typical quiescent current of 18mA and a nominal
supply voltage of +12V, the total internal power dissipation
for the solution of Figure 6 will be:
(13)
P_TOT
=
18mA(12V) + ^128mA (12V) – 2(20mW) = 464mW
5.33
OPA2677
17
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