OPA2670IRGVR Datasheet, PDF (17/25 Pages) Texas Instruments – Single Port, High Output Current VDSL2 Line Driver with Power Control

OPA2670
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DIFFERENTIAL NOISE PERFORMANCE
The OPA2670 is designed to be used as a differential
driver in xDSL applications. Therefore, it is important
to analyze the noise in such a configuration.
Figure 44 shows the op amp noise model for the
differential configuration.
I_N
E_N
R_S
E_RS
4kTR_S
I_N
R_F
4kTR_F
R_G
E_O2
4kTR_G
R_F
4kTR_F
I_N
R_S
E_N
I_N
E_RS
4kTR_S
Figure 44. Differential Op Amp Noise Analysis
Model
As a reminder, the differential gain is expressed as:
G_D = 1 +
2 ´ R_F
R_G
(15)
The output noise can be expressed as shown below:
E_O = 2 ´ G_D2 ´ e_N² + (i_N ´ R_S)² + 4kTR_S + 2(i_IR_F)² + 2(4kTR_FG_D)
(16)
SBOS434 – AUGUST 2010
Dividing this expression by the differential noise gain
[G_D = (1 + 2R_F/R_G)] gives the equivalent
input-referred spot noise voltage at the noninverting
input, as shown in Equation 17.
E_O =
2 ´ e_N² + (i_N ´ R_S)² + 4kTR_S
+2
i_IR_F
2
+2
4kTR_F
G_D
G_D
(17)
Evaluating these equations for the OPA2670 ADSL
circuit and component values of Figure 39 gives a
total output spot noise voltage of 66.7nV/√Hz and a
total equivalent input spot noise voltage of
6.67nV/√Hz
In order to minimize the output noise as a result of
the noninverting input bias current noise, it is
recommended to keep the noninverting source
impedance as low as possible.
DC ACCURACY AND OFFSET CONTROL
A current-feedback op amp such as the OPA2670
provides exceptional bandwidth in high gains, giving
fast pulse settling but only moderate dc accuracy.
The Electrical Characteristics show an input offset
voltage comparable to high-speed, voltage-feedback
amplifiers; however, the two input bias currents are
somewhat higher and are unmatched. While bias
current cancellation techniques are very effective with
most voltage-feedback op amps, they do not
generally reduce the output dc offset for wideband
current-feedback op amps. Because the two input
bias currents are unrelated in both magnitude and
polarity, matching the input source impedance to
reduce error contribution to the output is ineffective.
Evaluating the configuration of Figure 38, using a
worst-case condition at +25°C input offset voltage
and the two input bias currents, gives a worst-case
output offset range equal to:
V_OFF = ±(NG × V_OS(MAX)) + (I_BN × R_S/2 × NG)
±(I_BI × R_F)
where NG = noninverting signal gain
= ±(10 × 6mV) + (24mA × 25Ω × 10)
±(750Ω × 34mA)
= ±60mV ± 6mV ± 25.5mV
V_OFF = ±121.8mV
Copyright © 2010, Texas Instruments Incorporated
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