OPA180-Q1 Datasheet, PDF (17/32 Pages) Texas Instruments – 0.1-uV/C Drift, Low-Noise, Rail-to-Rail Output, 36-V, Zero-Drift Operational Amplifiers

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OPA180-Q1, OPA2180-Q1
SBOS861 – MAY 2017
Feature Description (continued)
8.3.4 Capacitive Load and Stability
The dynamic characteristics of the OPAx180-Q1 are optimized for a range of common operating conditions. The
combination of low closed-loop gain and high capacitive loads decreases the phase margin of the amplifier and
can lead to gain peaking or oscillations. As a result, heavier capacitive loads must be isolated from the output.
The simplest way to achieve this isolation is to add a small resistor (for example, R_OUT equal to 50 Ω) in series
with the output. Figure 27 and Figure 28 illustrate graphs of small-signal overshoot versus capacitive load for
several values of R_OUT. See the Feedback Plots Define Op Amp AC Performance, application report, available
for download from the TI website, for details of analysis techniques and application circuits.
40
R_OUT = 0 W
35
R_OUT = 25 W
30
R_OUT = 50 W
25
20
15
G=1
18 V
10
Device
ROUT
-18 V
RL
CL
5
0
0 100 200 300 400 500 600 700 800 900 1000
Capacitive Load (pF)
R_L = 10 kΩ
Figure 27. Small-Signal Overshoot Versus Capacitive Load
(100-mV Output Step)
40
R_OUT = 0 W
35
R_OUT = 25 W
30
R_OUT = 50 W
25
20
15
10
5
0
0
G = -1 ^RI ^{= 10 kW R}F ^{= 10 kW}
18 V
Device
-18 V
ROUT
CL
100 200 300 400 500 600 700 800 900 1000
Capacitive Load (pF)
R_L = 10 kΩ
Figure 28. Small-Signal Overshoot Versus Capacitive Load
(100-mV Output Step)
8.3.5 Electrical Overstress
Designers often ask questions about the capability of an operational amplifier to withstand electrical overstress.
These questions tend to focus on the device inputs, but may involve the supply voltage pins or the output pin.
Each of these different pin functions have electrical stress limits determined by the voltage breakdown
characteristics of the particular semiconductor fabrication process and specific circuits connected to the pin.
Additionally, internal electrostatic discharge (ESD) protection is built into these circuits to protect them from
accidental ESD events before and during product assembly.
These ESD protection diodes provide in-circuit, input overdrive protection, as long as the current is limited to 10
mA as stated in the Absolute Maximum Ratings table. Figure 29 shows how a series input resistor may be added
to the driven input to limit the input current. The added resistor contributes thermal noise at the amplifier input
and the value must be kept to a minimum in noise-sensitive applications.
V+
I_OVERLOAD
10 mA max
V_IN
5 kW
Device
V_OUT
Figure 29. Input Current Protection
An ESD event produces a short duration, high-voltage pulse that is transformed into a short duration, high-
current pulse as the pulse discharges through a semiconductor device. The ESD protection circuits are designed
to provide a current path around the operational amplifier core to prevent the core from damage. The energy
absorbed by the protection circuitry is then dissipated as heat.
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Product Folder Links: OPA180-Q1 OPA2180-Q1