BQ3285E_15 Datasheet, PDF (17/36 Pages) Texas Instruments – Real-Time Clock (RTC)

bq3285E/L
Read/Write Timing—bq3285E (T_A = T_OPR, V_CC = 5V ± 10%)
Symbol
Parameter
Minimum Typical
tCYC
Cycle time
160
-
tDSL
DS low or RD/WR high time
80
-
tDSH
DS high or RD/WR low time
55
-
tRWH
R/W hold time
0
-
tRWS
R/W setup time
10
-
tCS
Chip select setup time
5
-
tCH
Chip select hold time
0
-
tDHR
Read data hold time
0
-
tDHW
Write data hold time
0
-
tAS
Address setup time
20
-
tAH
Address hold time
5
-
tDAS
Delay time, DS to AS rise
10
-
tASW
Pulse width, AS high
30
-
tASD
Delay time, AS to DS rise (RD/WR
fall)
35
-
Output data delay time from DS rise
t_OD
(RD fall)
-
-
tDW
Write data setup time
30
-
tBUC
Delay time before update cycle
-
244
tPI
Periodic interrupt time interval
-
-
tUC
Time of update cycle
-
1
Maximum
-
-
-
-
-
-
-
25
-
-
-
-
-
-
50
-
-
-
-
Unit
Notes
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
-
See Table 3
µs
17