BQ27621-G1_16 Datasheet, PDF (17/26 Pages) Texas Instruments – System-Side Fuel Gauge With Dynamic Voltage Correlation

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11 Layout
bq27621-G1
SLUSBB3E – DECEMBER 2013 – REVISED JANUARY 2016
11.1 Layout Guidelines
• A capacitor, of value at least 0.47 µF, is connected between the V_DD pin and V_SS. The capacitor should be
placed close to the gauge IC and have short traces to both the V_DD pin and V_SS.
• It is required to have a capacitor, at least 1.0 µF, connected between the BAT pin and V_SS if the connection
between the battery pack and the gauge BAT pin has the potential to pick up noise. The capacitor should be
placed close to the gauge IC and have short traces to both the V_DD pin and V_SS.
• If the external pullup resistors on the SCL and SDA lines will be disconnected from the host during low-power
operation, it is recommend to use external 1-MΩ pulldown resistors to V_SS to avoid floating inputs to the I²C
engine.
• The value of the SCL and SDA pullup resistors should take into consideration the pullup voltage and the bus
capacitance. Some recommended values, assuming a bus capacitance of 10 pF, can be seen in Table 3.
Table 3. Recommended Values for SCL and SDA Pullup Resistors
VPU
1.8 V
3.3 V
Range
Typical
Range
Typical
R_PU
400 Ω ≤ R_PU ≤ 37.6 kΩ
10 kΩ
900 Ω ≤ R_PU ≤ 29.2 kΩ
5.1 kΩ
• If the GPOUT pin is not used by the host, the pin should still be pulled up to V_DD with a 4.7-kΩ or 10-kΩ
resistor.
• If the battery pack thermistor is not connected to the BIN pin, the BIN pin should be pulled down to V_SS with a
10-kΩ resistor.
• The BIN pin should not be shorted directly to V_DD or V_SS.
• The actual device ground is the center pin (B2). The C1 pin is floating internally and can be used as a bridge
to connect the board ground plane to the device ground (B2).
11.2 Layout Example
VSYS
CBAT
VDD
RSDA
RSCL
CVDD
Place close
to gauge IC.
Trace to pin
and VSS
should be
short
SCL
SDA
GPOUT
Via connects to Power Ground
BAT
BAT
VSS
VDD
VSS
BIN
SCL
SDA
GPOUT
Even is GPOUT
is not used by
host, the
GPOUT pin
should be
pulled up
VDD
Kelvin connect
the BAT pins
with PACK+
connection on
the battery pack
RGPOUT
RBIN
PACK+
TS
,I EDWWHU\ SDFN¶V WKHUPLVWRU ZLOO
not be connected to BIN pin, a
10-k pulldown resistor should
be connected to the BIN pin.
The BIN pin should not be
shorted directly to VDD or VSS.
PACK-
Battery Pack
RTHERM
Protection
IC
Li-Ion
Cell
+
NFET
NFET
Figure 13. Layout Example
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