BQ2050H_15 Datasheet, PDF (17/30 Pages) Texas Instruments – Low-Cost Lithium Ion Power Gauge™ IC

Not Recommended For New Designs
bq2050H
Maximum Cell Voltage Register (NMCV)
The NMCV register (address 15h) is used to set the
maximum battery pack voltage for control of the CFC
pin. If desired, the system can write a value to NMCV to
enable CFC to go low if V_SB exceeds this value. This
may be useful as a secondary protection of the Li-Ion
battery pack. NMCV should be set to the following
equation:
NMCV
=
2s
complement
of


256 ∗ MCV ∗RB2
1.2 ∗₍RB1 + RB2₎


Where:
MCV = maximum desired battery stack voltage.
NMCV = set to 00h on power up or reset and
should be programmed to the desired value
by the host system.
Discharge Count Register (DCR)
The DCR register (address = 18h) stores the high-byte of
the discharge count. DCR is reset to zero at the start of
a valid discharge cycle and can count to a maximum of
FFh. DCR will not increment if EDV1 = 1 and will not
roll over from FFh.
Program Pin Full Count (PPFC)
The PPFC register contains information concerning the
program pin configuration. This information is used to
determine the data integrity of the bq2050H. The only
approved user application for this register is to
write a zero to this register as part of a reset re-
quest.
Voltage Offset (V_OS) Interrupt (INTSS)
The INTSS register (address = 38h) is useful during in-
tial characterization of bq2050H designs. When the
bq2050H counts a charge pulse, CHGI (bit 0) will be set
to 1. When the bq2050H counts a discharge pulse,
DCHGI (bit 3) will be set to 1. All other locations in the
INTSS register are reserved.
Reset Register (RST)
The reset register (address = 39h) provides an alternate
means of initializing the bq2050H via software. Since this
register contains device test bits, it is recommended to use
the PPFC and LMD registers to reset the bq2050H. Set-
ting any bits in the reset register is not allowed and
will result in improper bq2050H operation. The rec-
ommended reset method for the bq2050H is :
I Write PPFC to zero
I Write LMD to zero
After these operations, a software reset will occur.
Resetting the bq2050H sets the following:
I LMD = PFC
I CPI, VDQ, RCAC, NACH/L, CACH/L, SAEH/L,
NMCV = 0
I CI and BRP = 1
Check Register (HEXFF)
The HEXFF register (address = 3F) is useful in de-
terming if the device is a bq2050H or a bq2050. This
register is always set to FFh for the bq2050H. The
bq2050 returns data other than FFh.
Display
The bq2050H can directly display capacity information
using low-power LEDs. If LEDs are used, the program
pins should be resistively tied to V_CC or V_SS for a pro-
gram high or program low, respectively.
The bq2050H displays the battery charge state in relative
mode. In relative mode, the battery charge is represented
as a percentage of the LMD. Each LED segment repre-
sents 20% of the LMD.
The capacity display is also adjusted for the present battery
temperature and discharge rate. The temperature adjust-
ment reflects the available capacity at a given temperature
but does not affect the NAC register. The temperature adjust-
ments are detailed in the CACT and CACD register descrip-
tions.
When DISP is tied to V_CC, the SEG_1–5 outputs are inac-
tive. When DISP is left floating, the display becomes ac-
tive whenever the bq2050H detects a charge in progress
V_SRO > V_SRQ. When pulled low, the segment outputs be-
come active for a period of four seconds, ± 0.5 seconds.
The segment outputs are modulated as two banks, with seg-
ments 1, 3, and 5 alternating with segments 2 and 4. The
segment outputs are modulated at approximately 100Hz with
each segment bank active for 30% of the period.
SEG₁ blinks at a 4Hz rate whenever V_SB has been de-
tected to be below V_EDV1 (EDV1 = 1), indicating a low-
battery condition. V_SB below V_EDVF (EDVF = 1) disables
the display output.
Microregulator
A micropower source for the bq2050H can be inexpen-
sively built using a FET and an external resistor. (See
Figure 1.)
17