BQ2050H_15 Datasheet, PDF (16/30 Pages) Texas Instruments – Low-Cost Lithium Ion Power Gauge™ IC

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bq2050H
The CPI register is incremented every time a valid
charge is detected. When NAC > 0.94 _* LMD, however,
the CPI register increments on the first valid charge;
CPI does not increment again for a valid charge until
NAC < 0.94 _* LMD. This prevents continuous trickle
charging from incrementing CPI if self-discharge decre-
ments NAC. The CPI register increments to 255 with-
out rolling over. When the contents of CPI are incre-
mented to 64, the capacity inaccurate flag, CI, is as-
serted in the FLGS1 register. The CPI register is reset
whenever an update of the LMD register is performed,
and the CI flag is also cleared.
Battery Voltage Register (VSB)
The battery voltage register is used to read the single-cell
battery voltage on the SB pin. The VSB register (address
= 0Bh) is updated approximately once per second with the
present value of the battery voltage.
V_SB = 1.2V _* (VSB/256).
VSB Register Bits
7
6
5
4
3
2
1
0
VSB7 VSB6 VSB5 VSB4 VSB3 VSB2 VSB1 VSB0
Voltage Threshold Register (VTS)
The end-of-discharge threshold voltages (EDV1 and
EDVF) can be set using the VTS register (address =
0Ch). The VTS register sets the EDV1 trip point. EDVF
is set 25mV below EDV1. The default value in the VTS
register is A2h, representing EDV1 = 0.76V and EDVF =
0.735V. EDV1 = 1.2V _* (VTS/256).
VTS Register Bits
7
6
5
4
3
2
1
0
VTS7 VTS6 VTS5 VTS4 VTS3 VTS2 VTS1 VTS0
Scaled Available Energy Registers
(SAEH/SAEL)
The SAEH high-byte register (address = 0Fh) and the
SAEL low-byte register (address = 10h) are used to scale
battery voltage and CACT to a value that can be trans-
lated to watt-hours remaining under the present condi-
tions.
Relative CAC Register (RCAC)
The RCAC register (address = 11h) provides the relative
battery state-of-charge by dividing CACT by LMD.
RCAC varies from 0 to 64h representing relative state-
of-charge from 0 to 100%.
Current Scale Register (VSRH/VSRL)
The VSRH register (address = 12h) and the VSRL regis-
ter (address = 13h) report the average signal across the
SR and V_SS pins. The bq2050H updates this register
pair every 22.5s. V_SRH (high-byte) and V_SRL (low-byte)
form a 16-bit signed integer value representing the av-
erage current during this time. The battery pack current
can be calculated from:
I(mA) = (VSRH ∗ 256 + VSRL)/(8 ∗RS)
where:
R_S = sense resistor value in Ω.
V_SRH = high-byte value of battery current
V_SRL = low-byte value of battery current
The bq2050H indicates an average discharge current
with a “1” in the MSB position of the VSRH register. To
calculate discharge current, use the 2’s complement if
the concatenated register contents in the above equa-
tion.
Compensated Available Charge Registers
(CACT/CACD)
The CACD register (address = 0Eh) contains the NAC
value compensated for discharge rate. This is a mono-
tonicly decreasing value during discharge. If the dis-
charge rate is > 0.5C then this value is lower than NAC.
CACD is updated only when the discharge rate compen-
sated NAC value is a lower value than CACD during
discharge. During charge, CACD is continuously up-
dated with the NAC value.
The CACT register (address = 0Dh) contains the CACD
value compensated for temperature. CACT will contain
a value lower than CACD when the battery temperature
is below 10°C. The CACT value is also used in calculat-
ing the LED display pattern.
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