XPC8255ZUIFBC Datasheet, PDF (16/41 Pages) Texas Instruments – PowerQUICC II Integrated Communications Processor Hardware Specifications

Electrical and Thermal Characteristics
Figure 7 shows PIO, timer, and DMA signals.
Sys clk
PIO/IDMA/TIMER[TGATE assertion] input signals
(See note)
sp22
TIMER input signal [TGATE deassertion]
(See note)
IDMA output signals
sp23
sp22
sp42/sp43
sp23
sp42/sp43
TIMER/PIO
output signals
Note: TGATE is asserted on the rising edge of the clock; it is deasserted on the falling edge.
Figure 7. PIO, Timer, and DMA Signal Diagram
Table 9 lists SIU input characteristics.
Table 9. AC Characteristics for SIU Inputs¹
Spec Number
Setup Hold
Characteristic
Setup (ns)
66 MHz
Hold (ns)
66 MHz
sp11
sp10 AACK/ARTRY/TA/TS/TEA/DBG/BG/BR
6
1
sp12
sp10 Data bus in normal mode
5
1
sp13
sp10 Data bus in ECC and PARITY modes
8
1
sp14
sp10 DP pins
8
1
sp14
sp10 All other pins
5
1
Note:
1 _{Input specifications are measured from the 50% level of the signal to the 50% level of the rising edge of CLKIN. Timings are}
measured at the pin.
MPC8260 PowerQUICC II Integrated Communications Processor Hardware Specifications, Rev. 2
16
Freescale Semiconductor