TMS417800A Datasheet, PDF (16/24 Pages) Texas Instruments – 2097152 BY 8-BIT DYNAMIC RANDOM-ACCESS MEMORY

TMS417800A
2097152 BY 8-BIT
DYNAMIC RANDOM-ACCESS MEMORY
SMKS888B – AUGUST 1996 – REVISED SEPTEMBER 1997
PARAMETER MEASUREMENT INFORMATION
RAS
CAS
Address
tRASP
tCSH
tRCD
tRAH
tASC
tASR
Row
tCAS
tCP
tCAH
Column
tRP
tRHCP
tPC
tCAL
tRSH
tCRP
tRAL
Column
Don’t Care
tRAD
tDS
tCWL
tWP
tCWL
tRWL
W
Don’t Care
Don’t Care
Don’t Care
DQ0 – DQ7
Don’t Care
tDH
Valid Data In
tCLZ
Valid
In
tOEH
Don’t Care
Invalid Data out
tOEH
tOED
OE
Don’t Care
Don’t Care
NOTE A: A read cycle or a read-write cycle can be intermixed with write cycles as long as read and read-write timing specifications are not violated.
Figure 8. Enhanced-Page-Mode Write-Cycle Timing
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