TLC3545_14 Datasheet, PDF (16/27 Pages) Texas Instruments – 200-KSPS Sampling Rate Built-In Conversion Clock

TLC3541, TLC3545
SLAS345 − DECEMBER 2001
PRINCIPLES OF OPERATION
pseudo-differential inputs
The TLC3545 operates in pseudo-differential mode. The inverted input is available on pin 5. The inverted input
can tolerate a maximum input ripple of ±0.2 V. It is normally used for zero-scale offset cancellation or ground
noise rejection.
serial interface
Output data format is binary (unipolar straight binary).
binary
D Zero-Scale Code = 0000h, V_AIN = GND
D Full-Scale Code = 3FFFh, V_AIN = V_REF – 1 LSB
reference voltage
An external reference must be applied via pin 2, V_REF. The voltage level applied to this pin establishes the upper
limit of the analog inputs to produce a full-scale reading. The value of V_REF, and the analog input should not
exceed the positive supply or be less than GND, consistent with the specified absolute maximum ratings. The
digital output is at full scale when the input signal is equal to or higher than V_REF and at zero when the input
signal is equal to or less than GND.
auto-power down and power up
Auto-power down is built into the devices in order to reduce power consumption. The wake-up time is fast
enough to provide power down between each conversion cycle. The power-down state is initiated at the end
of conversion and wakes up on a falling CS edge (or rising FS edge, whichever occurs first, for TLC3541 only).
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