OPA2314-Q1 Datasheet, PDF (16/28 Pages) Texas Instruments – 3-MHz, Low-Power, Low-Noise, RRIO, 1.8-V CMOS Operational Amplifier

OPA2314-Q1
SLOS896A – DECEMBER 2014 – REVISED JANUARY 2015
Application Information (continued)
C₁
R₁
R₂
V_IN
C₂
R_F
R_G
www.ti.com
V_OUT
R₁ = R₂ = R
C₁ = C₂ = C
Q = Peaking factor
(Butterworth Q = 0.707)
f_{-3 dB} =
1
2pRC
R_F
( ^{RG =}
2-
1
Q
Figure 35. Two-Pole Low-Pass Sallen-Key Filter
8.1.2 Capacitive Load and Stability
The OPA2314-Q1 device is designed to be used in applications where driving a capacitive load is required. As
with all op-amps, specific instances can occur where the OPA2314-Q1 device can become unstable. The
particular op-amp circuit configuration, layout, gain, and output loading are some of the factors to consider when
establishing whether or not an amplifier is stable in operation. An op-amp in the unity-gain (1 V/V) buffer
configuration that drives a capacitive load exhibits a greater tendency to be unstable than an amplifier operated
at a higher noise gain. The capacitive load, in conjunction with the op-amp output resistance, creates a pole
within the feedback loop that degrades the phase margin. The degradation of the phase margin increases as the
capacitive loading increases. When operating in the unity-gain configuration, the OPA2314-Q1 device remains
stable with a pure capacitive load up to approximately 1 nF. The equivalent series resistance (ESR) of some very
large capacitors (C_L greater than 1 μF) is sufficient to alter the phase characteristics in the feedback loop such
that the amplifier remains stable. Increasing the amplifier closed-loop gain allows the amplifier to drive
increasingly larger capacitance. This increased capability is evident when observing the overshoot response of
the amplifier at higher voltage gains. See the graph, Small-Signal Overshoot vs. Capacitive Load.
One technique for increasing the capacitive load drive capability of the amplifier operating in a unity-gain
configuration is to insert a small resistor, typically 10 Ω to 20 Ω, in series with the output, as shown in Figure 36.
This resistor significantly reduces the overshoot and ringing associated with large capacitive loads. One possible
problem with this technique, however, is that a voltage divider is created with the added series resistor and any
resistor connected in parallel with the capacitive load. The voltage divider introduces a gain error at the output
that reduces the output swing.
V+
R_S
Device
V_OUT
V_IN
10 W to
20 W
R_L
C_L
Figure 36. Improving Capacitive Load Drive
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