HD3SS215 Datasheet, PDF (16/32 Pages) Texas Instruments – 6.0 Gbps HDMI DisplayPort 2:1/1:2 Differential Switch

HD3SS215, HD3SS215I
SLAS971D – MAY 2014 – REVISED OCTOBER 2015
Typical Applications (continued)
9.2.1.1 Design Requirements
Table 2. Design Parameters
DESIGN PARAMETER
VDD
Decoupling Capacitors
AC Capacitors
AUX Pull-Up/Pull-Down Resistors
Pull-Up/Pull-Down Resistors for Control Pins
CONFIG1/CONFIG2 Pull-Down Resistors
EXAMPLE VALUE
3.3 V
0.1 µF
75 nF to 200 nF (100 nF shown)
10 kΩ to105 kΩ (100 kΩ shown)
10 kΩ
1 MΩ and 5 MΩ
www.ti.com
9.2.1.2 Detailed Design Procedure
The HD3SS215 is designed to operate with a 3.3 V power supply. Levels above those listed in the Absolute
Ratings table should not be used. If using a higher voltage system power supply, a voltage regulator can be used
to step down to 3.3 V. Decoupling capacitors may be used to reduce noise and improve power supply integrity.
AC capacitors must be placed on the MainLink lines. Additionally, AC capacitors are placed on the AUXC lines.
After the blocking capacitors, the AUXCp line must be pulled down weakly through a resistor to ground, and the
AUXCn line must be pulled up weakly through a resistor to VDD. The voltage level of the control pins, AUX_SEL
and Dx_SEL should be set according to the application and muxing desired. For a DisplayPort connector, the
CONFIG1 and CONFIG2 pins should be pulled to ground through resistors. For Dual Mode adapter
implementation, the CONFIG1 line may be used to perform cable adapter detection. The CONFIG2 line can be
configured for an HDMI adaptor or left as a no connect for a DVI adapter. The CONFIG2 pin on the connector
should be pulled up or left floating accordingly for Dual Mode adapter configuration.
16
Submit Documentation Feedback
Product Folder Links: HD3SS215
Copyright © 2014–2015, Texas Instruments Incorporated